arm/mach-omap2/powerdomain.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP2/3/4 powerdomain control
0004  *
0005  * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
0006  * Copyright (C) 2007-2011 Nokia Corporation
0007  *
0008  * Paul Walmsley
0009  *
0010  * XXX This should be moved to the mach-omap2/ directory at the earliest
0011  * opportunity.
0012  */
0013
0014 #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
0015 #define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
0016
0017 #include <linux/types.h>
0018 #include <linux/list.h>
0019 #include <linux/spinlock.h>
0020
0021 /* Powerdomain basic power states */
0022 #define PWRDM_POWER_OFF     0x0
0023 #define PWRDM_POWER_RET     0x1
0024 #define PWRDM_POWER_INACTIVE    0x2
0025 #define PWRDM_POWER_ON      0x3
0026
0027 #define PWRDM_MAX_PWRSTS    4
0028
0029 /* Powerdomain allowable state bitfields */
0030 #define PWRSTS_ON       (1 << PWRDM_POWER_ON)
0031 #define PWRSTS_INACTIVE     (1 << PWRDM_POWER_INACTIVE)
0032 #define PWRSTS_RET      (1 << PWRDM_POWER_RET)
0033 #define PWRSTS_OFF      (1 << PWRDM_POWER_OFF)
0034
0035 #define PWRSTS_OFF_ON       (PWRSTS_OFF | PWRSTS_ON)
0036 #define PWRSTS_OFF_RET      (PWRSTS_OFF | PWRSTS_RET)
0037 #define PWRSTS_RET_ON       (PWRSTS_RET | PWRSTS_ON)
0038 #define PWRSTS_OFF_RET_ON   (PWRSTS_OFF_RET | PWRSTS_ON)
0039 #define PWRSTS_INA_ON       (PWRSTS_INACTIVE | PWRSTS_ON)
0040
0041
0042 /*
0043  * Powerdomain flags (struct powerdomain.flags)
0044  *
0045  * PWRDM_HAS_HDWR_SAR - powerdomain has hardware save-and-restore support
0046  *
0047  * PWRDM_HAS_MPU_QUIRK - MPU pwr domain has MEM bank 0 bits in MEM
0048  * bank 1 position. This is true for OMAP3430
0049  *
0050  * PWRDM_HAS_LOWPOWERSTATECHANGE - can transition from a sleep state
0051  * to a lower sleep state without waking up the powerdomain
0052  */
0053 #define PWRDM_HAS_HDWR_SAR      BIT(0)
0054 #define PWRDM_HAS_MPU_QUIRK     BIT(1)
0055 #define PWRDM_HAS_LOWPOWERSTATECHANGE   BIT(2)
0056
0057 /*
0058  * Number of memory banks that are power-controllable.  On OMAP4430, the
0059  * maximum is 5.
0060  */
0061 #define PWRDM_MAX_MEM_BANKS 5
0062
0063 /*
0064  * Maximum number of clockdomains that can be associated with a powerdomain.
0065  * PER powerdomain on AM33XX is the worst case
0066  */
0067 #define PWRDM_MAX_CLKDMS    11
0068
0069 /* XXX A completely arbitrary number. What is reasonable here? */
0070 #define PWRDM_TRANSITION_BAILOUT 100000
0071
0072 struct clockdomain;
0073 struct powerdomain;
0074 struct voltagedomain;
0075
0076 /**
0077  * struct powerdomain - OMAP powerdomain
0078  * @name: Powerdomain name
0079  * @voltdm: voltagedomain containing this powerdomain
0080  * @prcm_offs: the address offset from CM_BASE/PRM_BASE
0081  * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
0082  * @pwrsts: Possible powerdomain power states
0083  * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
0084  * @flags: Powerdomain flags
0085  * @banks: Number of software-controllable memory banks in this powerdomain
0086  * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
0087  * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
0088  * @pwrdm_clkdms: Clockdomains in this powerdomain
0089  * @node: list_head linking all powerdomains
0090  * @voltdm_node: list_head linking all powerdomains in a voltagedomain
0091  * @pwrstctrl_offs: (AM33XX only) XXX_PWRSTCTRL reg offset from prcm_offs
0092  * @pwrstst_offs: (AM33XX only) XXX_PWRSTST reg offset from prcm_offs
0093  * @logicretstate_mask: (AM33XX only) mask for logic retention bitfield
0094  *  in @pwrstctrl_offs
0095  * @mem_on_mask: (AM33XX only) mask for mem on bitfield in @pwrstctrl_offs
0096  * @mem_ret_mask: (AM33XX only) mask for mem ret bitfield in @pwrstctrl_offs
0097  * @mem_pwrst_mask: (AM33XX only) mask for mem state bitfield in @pwrstst_offs
0098  * @mem_retst_mask: (AM33XX only) mask for mem retention state bitfield
0099  *  in @pwrstctrl_offs
0100  * @state:
0101  * @state_counter:
0102  * @timer:
0103  * @state_timer:
0104  * @_lock: spinlock used to serialize powerdomain and some clockdomain ops
0105  * @_lock_flags: stored flags when @_lock is taken
0106  *
0107  * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
0108  */
0109 struct powerdomain {
0110     const char *name;
0111     union {
0112         const char *name;
0113         struct voltagedomain *ptr;
0114     } voltdm;
0115     const s16 prcm_offs;
0116     const u8 pwrsts;
0117     const u8 pwrsts_logic_ret;
0118     const u8 flags;
0119     const u8 banks;
0120     const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
0121     const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
0122     const u8 prcm_partition;
0123     struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
0124     struct list_head node;
0125     struct list_head voltdm_node;
0126     int state;
0127     unsigned state_counter[PWRDM_MAX_PWRSTS];
0128     unsigned ret_logic_off_counter;
0129     unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
0130     spinlock_t _lock;
0131     unsigned long _lock_flags;
0132     const u8 pwrstctrl_offs;
0133     const u8 pwrstst_offs;
0134     const u32 logicretstate_mask;
0135     const u32 mem_on_mask[PWRDM_MAX_MEM_BANKS];
0136     const u32 mem_ret_mask[PWRDM_MAX_MEM_BANKS];
0137     const u32 mem_pwrst_mask[PWRDM_MAX_MEM_BANKS];
0138     const u32 mem_retst_mask[PWRDM_MAX_MEM_BANKS];
0139
0140 #ifdef CONFIG_PM_DEBUG
0141     s64 timer;
0142     s64 state_timer[PWRDM_MAX_PWRSTS];
0143 #endif
0144     u32 context;
0145 };
0146
0147 /**
0148  * struct pwrdm_ops - Arch specific function implementations
0149  * @pwrdm_set_next_pwrst: Set the target power state for a pd
0150  * @pwrdm_read_next_pwrst: Read the target power state set for a pd
0151  * @pwrdm_read_pwrst: Read the current power state of a pd
0152  * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
0153  * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
0154  * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
0155  * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
0156  * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
0157  * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
0158  * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
0159  * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
0160  * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
0161  * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
0162  * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
0163  * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
0164  * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
0165  * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
0166  * @pwrdm_wait_transition: Wait for a pd state transition to complete
0167  * @pwrdm_has_voltdm: Check if a voltdm association is needed
0168  *
0169  * Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family
0170  * chips, a powerdomain's power state is not allowed to directly
0171  * transition from one low-power state (e.g., CSWR) to another
0172  * low-power state (e.g., OFF) without first waking up the
0173  * powerdomain.  This wastes energy.  So OMAP4 chips support the
0174  * ability to transition a powerdomain power state directly from one
0175  * low-power state to another.  The function pointed to by
0176  * @pwrdm_set_lowpwrstchange is intended to configure the OMAP4
0177  * hardware powerdomain state machine to enable this feature.
0178  */
0179 struct pwrdm_ops {
0180     int (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
0181     int (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
0182     int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
0183     int (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
0184     int (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
0185     int (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
0186     int (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
0187     int (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
0188     int (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
0189     int (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
0190     int (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
0191     int (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
0192     int (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
0193     int (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
0194     int (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
0195     int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
0196     int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
0197     int (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
0198     int (*pwrdm_has_voltdm)(void);
0199     void    (*pwrdm_save_context)(struct powerdomain *pwrdm);
0200     void    (*pwrdm_restore_context)(struct powerdomain *pwrdm);
0201 };
0202
0203 int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
0204 int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
0205 int pwrdm_complete_init(void);
0206
0207 struct powerdomain *pwrdm_lookup(const char *name);
0208
0209 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
0210             void *user);
0211 int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
0212             void *user);
0213
0214 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
0215
0216 int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
0217
0218 u8 pwrdm_get_valid_lp_state(struct powerdomain *pwrdm,
0219                 bool is_logic_state, u8 req_state);
0220
0221 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
0222 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
0223 int pwrdm_read_pwrst(struct powerdomain *pwrdm);
0224 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
0225 int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
0226
0227 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
0228 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
0229 int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
0230
0231 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
0232 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
0233 int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
0234 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
0235 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
0236 int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
0237
0238 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
0239 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
0240 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
0241
0242 int pwrdm_state_switch_nolock(struct powerdomain *pwrdm);
0243 int pwrdm_state_switch(struct powerdomain *pwrdm);
0244 int pwrdm_pre_transition(struct powerdomain *pwrdm);
0245 int pwrdm_post_transition(struct powerdomain *pwrdm);
0246 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
0247 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
0248
0249 extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state);
0250
0251 extern void omap242x_powerdomains_init(void);
0252 extern void omap243x_powerdomains_init(void);
0253 extern void omap3xxx_powerdomains_init(void);
0254 extern void am33xx_powerdomains_init(void);
0255 extern void omap44xx_powerdomains_init(void);
0256 extern void omap54xx_powerdomains_init(void);
0257 extern void dra7xx_powerdomains_init(void);
0258 void am43xx_powerdomains_init(void);
0259
0260 extern struct pwrdm_ops omap2_pwrdm_operations;
0261 extern struct pwrdm_ops omap3_pwrdm_operations;
0262 extern struct pwrdm_ops am33xx_pwrdm_operations;
0263 extern struct pwrdm_ops omap4_pwrdm_operations;
0264
0265 /* Common Internal functions used across OMAP rev's */
0266 extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
0267 extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
0268 extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
0269
0270 extern struct powerdomain wkup_omap2_pwrdm;
0271 extern struct powerdomain gfx_omap2_pwrdm;
0272
0273 extern void pwrdm_lock(struct powerdomain *pwrdm);
0274 extern void pwrdm_unlock(struct powerdomain *pwrdm);
0275
0276 extern void pwrdms_save_context(void);
0277 extern void pwrdms_restore_context(void);
0278
0279 extern void pwrdms_lost_power(void);
0280 #endif