arm/mach-omap2/pm.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP2/3 Power Management Routines
0004  *
0005  * Copyright (C) 2008 Nokia Corporation
0006  * Jouni Hogander
0007  */
0008 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
0009 #define __ARCH_ARM_MACH_OMAP2_PM_H
0010
0011 #include <linux/err.h>
0012
0013 #include "powerdomain.h"
0014
0015 #ifdef CONFIG_CPU_IDLE
0016 extern int __init omap3_idle_init(void);
0017 extern int __init omap4_idle_init(void);
0018 #else
0019 static inline int omap3_idle_init(void)
0020 {
0021     return 0;
0022 }
0023
0024 static inline int omap4_idle_init(void)
0025 {
0026     return 0;
0027 }
0028 #endif
0029
0030 extern void *omap3_secure_ram_storage;
0031 extern void omap3_pm_off_mode_enable(int);
0032 extern void omap_sram_idle(void);
0033 extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
0034
0035 #if defined(CONFIG_PM_OPP)
0036 extern int omap3_opp_init(void);
0037 extern int omap4_opp_init(void);
0038 #else
0039 static inline int omap3_opp_init(void)
0040 {
0041     return -EINVAL;
0042 }
0043 static inline int omap4_opp_init(void)
0044 {
0045     return -EINVAL;
0046 }
0047 #endif
0048
0049 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
0050 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
0051
0052 extern u32 enable_off_mode;
0053
0054 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
0055 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
0056 #else
0057 #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
0058 #endif /* CONFIG_PM_DEBUG */
0059
0060 /* 24xx */
0061 extern void omap24xx_idle_loop_suspend(void);
0062 extern unsigned int omap24xx_idle_loop_suspend_sz;
0063
0064 extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
0065                     void __iomem *sdrc_power);
0066 extern unsigned int omap24xx_cpu_suspend_sz;
0067
0068 /* 3xxx */
0069 extern void omap34xx_cpu_suspend(int save_state);
0070
0071 /* omap3_do_wfi function pointer and size, for copy to SRAM */
0072 extern void omap3_do_wfi(void);
0073 extern unsigned int omap3_do_wfi_sz;
0074 /* ... and its pointer from SRAM after copy */
0075 extern void (*omap3_do_wfi_sram)(void);
0076
0077 extern struct am33xx_pm_sram_addr am33xx_pm_sram;
0078 extern struct am33xx_pm_sram_addr am43xx_pm_sram;
0079
0080 extern void omap3_save_scratchpad_contents(void);
0081
0082 #define PM_RTA_ERRATUM_i608     (1 << 0)
0083 #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
0084 #define PM_PER_MEMORIES_ERRATUM_i582    (1 << 2)
0085
0086 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
0087 extern u16 pm34xx_errata;
0088 #define IS_PM34XX_ERRATUM(id)       (pm34xx_errata & (id))
0089 extern void enable_omap3630_toggle_l2_on_restore(void);
0090 #else
0091 #define IS_PM34XX_ERRATUM(id)       0
0092 static inline void enable_omap3630_toggle_l2_on_restore(void) { }
0093 #endif      /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
0094
0095 #define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD  (1 << 0)
0096 #define PM_OMAP4_CPU_OSWR_DISABLE       (1 << 1)
0097
0098 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
0099        defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
0100 extern u16 pm44xx_errata;
0101 #define IS_PM44XX_ERRATUM(id)       (pm44xx_errata & (id))
0102 #else
0103 #define IS_PM44XX_ERRATUM(id)       0
0104 #endif
0105
0106 #define OMAP4_VP_CONFIG_ERROROFFSET 0x00
0107 #define OMAP4_VP_VSTEPMIN_VSTEPMIN  0x01
0108 #define OMAP4_VP_VSTEPMAX_VSTEPMAX  0x04
0109 #define OMAP4_VP_VLIMITTO_TIMEOUT_US    200
0110
0111 #ifdef CONFIG_POWER_AVS_OMAP
0112 extern int omap_devinit_smartreflex(void);
0113 extern void omap_enable_smartreflex_on_init(void);
0114 #else
0115 static inline int omap_devinit_smartreflex(void)
0116 {
0117     return -EINVAL;
0118 }
0119
0120 static inline void omap_enable_smartreflex_on_init(void) {}
0121 #endif
0122
0123 #ifdef CONFIG_TWL4030_CORE
0124 extern int omap3_twl_init(void);
0125 extern int omap4_twl_init(void);
0126 extern int omap3_twl_set_sr_bit(bool enable);
0127 #else
0128 static inline int omap3_twl_init(void)
0129 {
0130     return -EINVAL;
0131 }
0132 static inline int omap4_twl_init(void)
0133 {
0134     return -EINVAL;
0135 }
0136 #endif
0137
0138 #if IS_ENABLED(CONFIG_MFD_CPCAP)
0139 extern int omap4_cpcap_init(void);
0140 #else
0141 static inline int omap4_cpcap_init(void)
0142 {
0143     return -EINVAL;
0144 }
0145 #endif
0146
0147 #ifdef CONFIG_PM
0148 extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
0149 extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
0150 extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
0151 #else
0152 static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
0153 static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
0154 static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
0155 #endif
0156
0157 #ifdef CONFIG_SUSPEND
0158 void omap_common_suspend_init(void *pm_suspend);
0159 #else
0160 static inline void omap_common_suspend_init(void *pm_suspend)
0161 {
0162 }
0163 #endif /* CONFIG_SUSPEND */
0164 #endif