arm/mach-omap2/opp3xxx_data.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * OMAP3 OPP table definitions.
0004  *
0005  * Copyright (C) 2009-2010 Texas Instruments Incorporated - https://www.ti.com/
0006  *  Nishanth Menon
0007  *  Kevin Hilman
0008  * Copyright (C) 2010-2011 Nokia Corporation.
0009  *      Eduardo Valentin
0010  *      Paul Walmsley
0011  */
0012 #include <linux/module.h>
0013
0014 #include "soc.h"
0015 #include "control.h"
0016 #include "omap_opp_data.h"
0017 #include "pm.h"
0018
0019 /* 34xx */
0020
0021 /* VDD1 */
0022
0023 #define OMAP3430_VDD_MPU_OPP1_UV        975000
0024 #define OMAP3430_VDD_MPU_OPP2_UV        1075000
0025 #define OMAP3430_VDD_MPU_OPP3_UV        1200000
0026 #define OMAP3430_VDD_MPU_OPP4_UV        1270000
0027 #define OMAP3430_VDD_MPU_OPP5_UV        1350000
0028
0029 struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
0030     VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
0031     VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
0032     VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
0033     VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
0034     VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
0035     VOLT_DATA_DEFINE(0, 0, 0, 0),
0036 };
0037
0038 /* VDD2 */
0039
0040 #define OMAP3430_VDD_CORE_OPP1_UV       975000
0041 #define OMAP3430_VDD_CORE_OPP2_UV       1050000
0042 #define OMAP3430_VDD_CORE_OPP3_UV       1150000
0043
0044 struct omap_volt_data omap34xx_vddcore_volt_data[] = {
0045     VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
0046     VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
0047     VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
0048     VOLT_DATA_DEFINE(0, 0, 0, 0),
0049 };
0050
0051 /* 36xx */
0052
0053 /* VDD1 */
0054
0055 #define OMAP3630_VDD_MPU_OPP50_UV       1012500
0056 #define OMAP3630_VDD_MPU_OPP100_UV      1200000
0057 #define OMAP3630_VDD_MPU_OPP120_UV      1325000
0058 #define OMAP3630_VDD_MPU_OPP1G_UV       1375000
0059
0060 struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
0061     VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
0062     VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
0063     VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
0064     VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
0065     VOLT_DATA_DEFINE(0, 0, 0, 0),
0066 };
0067
0068 /* VDD2 */
0069
0070 #define OMAP3630_VDD_CORE_OPP50_UV      1000000
0071 #define OMAP3630_VDD_CORE_OPP100_UV     1200000
0072
0073 struct omap_volt_data omap36xx_vddcore_volt_data[] = {
0074     VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
0075     VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
0076     VOLT_DATA_DEFINE(0, 0, 0, 0),
0077 };