arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
0004  *
0005  * Copyright (C) 2009-2011 Nokia Corporation
0006  * Paul Walmsley
0007  *
0008  * XXX handle crossbar/shared link difference for L3?
0009  * XXX these should be marked initdata for multi-OMAP kernels
0010  */
0011 #include <linux/sizes.h>
0012
0013 #include "omap_hwmod.h"
0014 #include "l3_2xxx.h"
0015 #include "l4_2xxx.h"
0016 #include "serial.h"
0017
0018 #include "omap_hwmod_common_data.h"
0019
0020 /*
0021  * Common interconnect data
0022  */
0023
0024 /* L3 -> L4_CORE interface */
0025 struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
0026     .master = &omap2xxx_l3_main_hwmod,
0027     .slave  = &omap2xxx_l4_core_hwmod,
0028     .user   = OCP_USER_MPU | OCP_USER_SDMA,
0029 };
0030
0031 /* MPU -> L3 interface */
0032 struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
0033     .master = &omap2xxx_mpu_hwmod,
0034     .slave  = &omap2xxx_l3_main_hwmod,
0035     .user   = OCP_USER_MPU,
0036 };
0037
0038 /* DSS -> l3 */
0039 struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
0040     .master     = &omap2xxx_dss_core_hwmod,
0041     .slave      = &omap2xxx_l3_main_hwmod,
0042     .fw = {
0043         .omap2 = {
0044             .l3_perm_bit  = OMAP2_L3_CORE_FW_CONNID_DSS,
0045             .flags  = OMAP_FIREWALL_L3,
0046         },
0047     },
0048     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0049 };
0050
0051 /* L4_CORE -> L4_WKUP interface */
0052 struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
0053     .master = &omap2xxx_l4_core_hwmod,
0054     .slave  = &omap2xxx_l4_wkup_hwmod,
0055     .user   = OCP_USER_MPU | OCP_USER_SDMA,
0056 };
0057
0058 /* L4 CORE -> UART1 interface */
0059 struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
0060     .master     = &omap2xxx_l4_core_hwmod,
0061     .slave      = &omap2xxx_uart1_hwmod,
0062     .clk        = "uart1_ick",
0063     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0064 };
0065
0066 /* L4 CORE -> UART2 interface */
0067 struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
0068     .master     = &omap2xxx_l4_core_hwmod,
0069     .slave      = &omap2xxx_uart2_hwmod,
0070     .clk        = "uart2_ick",
0071     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0072 };
0073
0074 /* L4 PER -> UART3 interface */
0075 struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
0076     .master     = &omap2xxx_l4_core_hwmod,
0077     .slave      = &omap2xxx_uart3_hwmod,
0078     .clk        = "uart3_ick",
0079     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0080 };
0081
0082 /* l4 core -> mcspi1 interface */
0083 struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
0084     .master     = &omap2xxx_l4_core_hwmod,
0085     .slave      = &omap2xxx_mcspi1_hwmod,
0086     .clk        = "mcspi1_ick",
0087     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0088 };
0089
0090 /* l4 core -> mcspi2 interface */
0091 struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
0092     .master     = &omap2xxx_l4_core_hwmod,
0093     .slave      = &omap2xxx_mcspi2_hwmod,
0094     .clk        = "mcspi2_ick",
0095     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0096 };
0097
0098 /* l4_core -> timer3 */
0099 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
0100     .master     = &omap2xxx_l4_core_hwmod,
0101     .slave      = &omap2xxx_timer3_hwmod,
0102     .clk        = "gpt3_ick",
0103     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0104 };
0105
0106 /* l4_core -> timer4 */
0107 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {
0108     .master     = &omap2xxx_l4_core_hwmod,
0109     .slave      = &omap2xxx_timer4_hwmod,
0110     .clk        = "gpt4_ick",
0111     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0112 };
0113
0114 /* l4_core -> timer5 */
0115 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {
0116     .master     = &omap2xxx_l4_core_hwmod,
0117     .slave      = &omap2xxx_timer5_hwmod,
0118     .clk        = "gpt5_ick",
0119     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0120 };
0121
0122 /* l4_core -> timer6 */
0123 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {
0124     .master     = &omap2xxx_l4_core_hwmod,
0125     .slave      = &omap2xxx_timer6_hwmod,
0126     .clk        = "gpt6_ick",
0127     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0128 };
0129
0130 /* l4_core -> timer7 */
0131 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {
0132     .master     = &omap2xxx_l4_core_hwmod,
0133     .slave      = &omap2xxx_timer7_hwmod,
0134     .clk        = "gpt7_ick",
0135     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0136 };
0137
0138 /* l4_core -> timer8 */
0139 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {
0140     .master     = &omap2xxx_l4_core_hwmod,
0141     .slave      = &omap2xxx_timer8_hwmod,
0142     .clk        = "gpt8_ick",
0143     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0144 };
0145
0146 /* l4_core -> timer9 */
0147 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {
0148     .master     = &omap2xxx_l4_core_hwmod,
0149     .slave      = &omap2xxx_timer9_hwmod,
0150     .clk        = "gpt9_ick",
0151     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0152 };
0153
0154 /* l4_core -> timer10 */
0155 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {
0156     .master     = &omap2xxx_l4_core_hwmod,
0157     .slave      = &omap2xxx_timer10_hwmod,
0158     .clk        = "gpt10_ick",
0159     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0160 };
0161
0162 /* l4_core -> timer11 */
0163 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {
0164     .master     = &omap2xxx_l4_core_hwmod,
0165     .slave      = &omap2xxx_timer11_hwmod,
0166     .clk        = "gpt11_ick",
0167     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0168 };
0169
0170 /* l4_core -> timer12 */
0171 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {
0172     .master     = &omap2xxx_l4_core_hwmod,
0173     .slave      = &omap2xxx_timer12_hwmod,
0174     .clk        = "gpt12_ick",
0175     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0176 };
0177
0178 /* l4_core -> dss */
0179 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {
0180     .master     = &omap2xxx_l4_core_hwmod,
0181     .slave      = &omap2xxx_dss_core_hwmod,
0182     .clk        = "dss_ick",
0183     .fw = {
0184         .omap2 = {
0185             .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
0186             .flags  = OMAP_FIREWALL_L4,
0187         },
0188     },
0189     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0190 };
0191
0192 /* l4_core -> dss_dispc */
0193 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {
0194     .master     = &omap2xxx_l4_core_hwmod,
0195     .slave      = &omap2xxx_dss_dispc_hwmod,
0196     .clk        = "dss_ick",
0197     .fw = {
0198         .omap2 = {
0199             .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
0200             .flags  = OMAP_FIREWALL_L4,
0201         },
0202     },
0203     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0204 };
0205
0206 /* l4_core -> dss_rfbi */
0207 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {
0208     .master     = &omap2xxx_l4_core_hwmod,
0209     .slave      = &omap2xxx_dss_rfbi_hwmod,
0210     .clk        = "dss_ick",
0211     .fw = {
0212         .omap2 = {
0213             .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
0214             .flags  = OMAP_FIREWALL_L4,
0215         },
0216     },
0217     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0218 };
0219
0220 /* l4_core -> dss_venc */
0221 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
0222     .master     = &omap2xxx_l4_core_hwmod,
0223     .slave      = &omap2xxx_dss_venc_hwmod,
0224     .clk        = "dss_ick",
0225     .fw = {
0226         .omap2 = {
0227             .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
0228             .flags  = OMAP_FIREWALL_L4,
0229         },
0230     },
0231     .flags      = OCPIF_SWSUP_IDLE,
0232     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0233 };
0234
0235 /* l4_core -> rng */
0236 struct omap_hwmod_ocp_if omap2xxx_l4_core__rng = {
0237     .master     = &omap2xxx_l4_core_hwmod,
0238     .slave      = &omap2xxx_rng_hwmod,
0239     .clk        = "rng_ick",
0240     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0241 };
0242
0243 /* l4 core -> sham interface */
0244 struct omap_hwmod_ocp_if omap2xxx_l4_core__sham = {
0245     .master     = &omap2xxx_l4_core_hwmod,
0246     .slave      = &omap2xxx_sham_hwmod,
0247     .clk        = "sha_ick",
0248     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0249 };
0250
0251 /* l4 core -> aes interface */
0252 struct omap_hwmod_ocp_if omap2xxx_l4_core__aes = {
0253     .master     = &omap2xxx_l4_core_hwmod,
0254     .slave      = &omap2xxx_aes_hwmod,
0255     .clk        = "aes_ick",
0256     .user       = OCP_USER_MPU | OCP_USER_SDMA,
0257 };