arm/mach-omap2/omap54xx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*:
0003  * Address mappings and base address for OMAP5 interconnects
0004  * and peripherals.
0005  *
0006  * Copyright (C) 2012 Texas Instruments
0007  *  Santosh Shilimkar <santosh.shilimkar@ti.com>
0008  *  Sricharan <r.sricharan@ti.com>
0009  */
0010 #ifndef __ASM_SOC_OMAP54XX_H
0011 #define __ASM_SOC_OMAP54XX_H
0012
0013 /*
0014  * Please place only base defines here and put the rest in device
0015  * specific headers.
0016  */
0017 #define L4_54XX_BASE            0x4a000000
0018 #define L4_WK_54XX_BASE         0x4ae00000
0019 #define L4_PER_54XX_BASE        0x48000000
0020 #define L3_54XX_BASE            0x44000000
0021 #define OMAP54XX_32KSYNCT_BASE      0x4ae04000
0022 #define OMAP54XX_CM_CORE_AON_BASE   0x4a004000
0023 #define OMAP54XX_CM_CORE_BASE       0x4a008000
0024 #define OMAP54XX_PRM_BASE       0x4ae06000
0025 #define OMAP54XX_PRCM_MPU_BASE      0x48243000
0026 #define OMAP54XX_SCM_BASE       0x4a002000
0027 #define OMAP54XX_CTRL_BASE      0x4a002800
0028 #define OMAP54XX_SAR_RAM_BASE       0x4ae26000
0029
0030 /* DRA7 specific base addresses */
0031 #define L3_MAIN_SN_DRA7XX_BASE      0x44000000
0032 #define L4_PER1_DRA7XX_BASE     0x48000000
0033 #define L4_CFG_MPU_DRA7XX_BASE      0x48210000
0034 #define L4_PER2_DRA7XX_BASE     0x48400000
0035 #define L4_PER3_DRA7XX_BASE     0x48800000
0036 #define L4_CFG_DRA7XX_BASE      0x4A000000
0037 #define L4_WKUP_DRA7XX_BASE     0x4ae00000
0038 #define DRA7XX_CM_CORE_AON_BASE     0x4a005000
0039 #define DRA7XX_CTRL_BASE        0x4a003400
0040 #define DRA7XX_TAP_BASE         0x4ae0c000
0041
0042 #endif /* __ASM_SOC_OMAP555554XX_H */