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0001 /*
0002  * Header for code common to all OMAP2+ machines.
0003  *
0004  * This program is free software; you can redistribute it and/or modify it
0005  * under the terms of the GNU General Public License as published by the
0006  * Free Software Foundation; either version 2 of the License, or (at your
0007  * option) any later version.
0008  *
0009  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
0010  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
0011  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
0012  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
0013  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
0014  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
0015  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
0016  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0017  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
0018  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0019  *
0020  * You should have received a copy of the  GNU General Public License along
0021  * with this program; if not, write  to the Free Software Foundation, Inc.,
0022  * 675 Mass Ave, Cambridge, MA 02139, USA.
0023  */
0024 
0025 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
0026 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
0027 #ifndef __ASSEMBLER__
0028 
0029 #include <linux/irq.h>
0030 #include <linux/delay.h>
0031 #include <linux/i2c.h>
0032 #include <linux/mfd/twl.h>
0033 #include <linux/platform_data/i2c-omap.h>
0034 #include <linux/reboot.h>
0035 #include <linux/irqchip/irq-omap-intc.h>
0036 
0037 #include <asm/proc-fns.h>
0038 #include <asm/hardware/cache-l2x0.h>
0039 
0040 #include "i2c.h"
0041 #include "serial.h"
0042 
0043 #include "usb.h"
0044 
0045 #define OMAP_INTC_START     NR_IRQS
0046 
0047 extern int (*omap_pm_soc_init)(void);
0048 int omap_pm_nop_init(void);
0049 
0050 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
0051 int omap2_pm_init(void);
0052 #else
0053 static inline int omap2_pm_init(void)
0054 {
0055     return 0;
0056 }
0057 #endif
0058 
0059 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
0060 int omap3_pm_init(void);
0061 #else
0062 static inline int omap3_pm_init(void)
0063 {
0064     return 0;
0065 }
0066 #endif
0067 
0068 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
0069 int omap4_pm_init(void);
0070 int omap4_pm_init_early(void);
0071 #else
0072 static inline int omap4_pm_init(void)
0073 {
0074     return 0;
0075 }
0076 
0077 static inline int omap4_pm_init_early(void)
0078 {
0079     return 0;
0080 }
0081 #endif
0082 
0083 #if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \
0084     defined(CONFIG_SOC_AM43XX))
0085 int amx3_common_pm_init(void);
0086 #else
0087 static inline int amx3_common_pm_init(void)
0088 {
0089     return 0;
0090 }
0091 #endif
0092 
0093 extern void omap2_init_common_infrastructure(void);
0094 
0095 extern void omap_init_time(void);
0096 extern void omap3_secure_sync32k_timer_init(void);
0097 extern void omap3_gptimer_timer_init(void);
0098 extern void omap4_local_timer_init(void);
0099 #ifdef CONFIG_CACHE_L2X0
0100 int omap_l2_cache_init(void);
0101 #define OMAP_L2C_AUX_CTRL   (L2C_AUX_CTRL_SHARED_OVERRIDE | \
0102                  L310_AUX_CTRL_DATA_PREFETCH | \
0103                  L310_AUX_CTRL_INSTR_PREFETCH)
0104 void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
0105 #else
0106 static inline int omap_l2_cache_init(void)
0107 {
0108     return 0;
0109 }
0110 
0111 #define OMAP_L2C_AUX_CTRL   0
0112 #define omap4_l2c310_write_sec  NULL
0113 #endif
0114 
0115 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
0116 extern void omap5_realtime_timer_init(void);
0117 #else
0118 static inline void omap5_realtime_timer_init(void)
0119 {
0120 }
0121 #endif
0122 
0123 void omap2420_init_early(void);
0124 void omap2430_init_early(void);
0125 void omap3430_init_early(void);
0126 void omap35xx_init_early(void);
0127 void omap3630_init_early(void);
0128 void omap3_init_early(void);    /* Do not use this one */
0129 void am33xx_init_early(void);
0130 void am35xx_init_early(void);
0131 void ti814x_init_early(void);
0132 void ti816x_init_early(void);
0133 void am43xx_init_early(void);
0134 void am43xx_init_late(void);
0135 void omap4430_init_early(void);
0136 void omap5_init_early(void);
0137 void omap3_init_late(void);
0138 void omap4430_init_late(void);
0139 void omap2420_init_late(void);
0140 void omap2430_init_late(void);
0141 void ti81xx_init_late(void);
0142 void am33xx_init_late(void);
0143 void omap5_init_late(void);
0144 int omap2_common_pm_late_init(void);
0145 void dra7xx_init_early(void);
0146 void dra7xx_init_late(void);
0147 
0148 #ifdef CONFIG_SOC_BUS
0149 void omap_soc_device_init(void);
0150 #else
0151 static inline void omap_soc_device_init(void)
0152 {
0153 }
0154 #endif
0155 
0156 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
0157 void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
0158 #else
0159 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
0160 {
0161 }
0162 #endif
0163 
0164 #ifdef CONFIG_SOC_AM33XX
0165 void am33xx_restart(enum reboot_mode mode, const char *cmd);
0166 #else
0167 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
0168 {
0169 }
0170 #endif
0171 
0172 #ifdef CONFIG_ARCH_OMAP3
0173 void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
0174 #else
0175 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
0176 {
0177 }
0178 #endif
0179 
0180 #ifdef CONFIG_SOC_TI81XX
0181 void ti81xx_restart(enum reboot_mode mode, const char *cmd);
0182 #else
0183 static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
0184 {
0185 }
0186 #endif
0187 
0188 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
0189     defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
0190 void omap44xx_restart(enum reboot_mode mode, const char *cmd);
0191 #else
0192 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
0193 {
0194 }
0195 #endif
0196 
0197 #ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
0198 void omap_barrier_reserve_memblock(void);
0199 void omap_barriers_init(void);
0200 #else
0201 static inline void omap_barrier_reserve_memblock(void)
0202 {
0203 }
0204 #endif
0205 
0206 /* This gets called from mach-omap2/io.c, do not call this */
0207 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
0208 
0209 void __init omap242x_map_io(void);
0210 void __init omap243x_map_io(void);
0211 void __init omap3_map_io(void);
0212 void __init am33xx_map_io(void);
0213 void __init omap4_map_io(void);
0214 void __init omap5_map_io(void);
0215 void __init dra7xx_map_io(void);
0216 void __init ti81xx_map_io(void);
0217 
0218 /**
0219  * omap_test_timeout - busy-loop, testing a condition
0220  * @cond: condition to test until it evaluates to true
0221  * @timeout: maximum number of microseconds in the timeout
0222  * @index: loop index (integer)
0223  *
0224  * Loop waiting for @cond to become true or until at least @timeout
0225  * microseconds have passed.  To use, define some integer @index in the
0226  * calling code.  After running, if @index == @timeout, then the loop has
0227  * timed out.
0228  */
0229 #define omap_test_timeout(cond, timeout, index)         \
0230 ({                              \
0231     for (index = 0; index < timeout; index++) {     \
0232         if (cond)                   \
0233             break;                  \
0234         udelay(1);                  \
0235     }                           \
0236 })
0237 
0238 extern struct device *omap2_get_mpuss_device(void);
0239 extern struct device *omap2_get_iva_device(void);
0240 extern struct device *omap2_get_l3_device(void);
0241 extern struct device *omap4_get_dsp_device(void);
0242 
0243 void omap_gic_of_init(void);
0244 
0245 #ifdef CONFIG_CACHE_L2X0
0246 extern void __iomem *omap4_get_l2cache_base(void);
0247 #endif
0248 
0249 struct device_node;
0250 
0251 #ifdef CONFIG_SMP
0252 extern void __iomem *omap4_get_scu_base(void);
0253 #else
0254 static inline void __iomem *omap4_get_scu_base(void)
0255 {
0256     return NULL;
0257 }
0258 #endif
0259 
0260 extern void gic_dist_disable(void);
0261 extern void gic_dist_enable(void);
0262 extern bool gic_dist_disabled(void);
0263 extern void gic_timer_retrigger(void);
0264 extern void _omap_smc1(u32 fn, u32 arg);
0265 extern void omap4_sar_ram_init(void);
0266 extern void __iomem *omap4_get_sar_ram_base(void);
0267 extern void omap4_mpuss_early_init(void);
0268 extern void omap_do_wfi(void);
0269 extern void omap_interconnect_sync(void);
0270 
0271 #ifdef CONFIG_SMP
0272 /* Needed for secondary core boot */
0273 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
0274 extern void omap_auxcoreboot_addr(u32 cpu_addr);
0275 extern u32 omap_read_auxcoreboot0(void);
0276 
0277 extern void omap4_cpu_die(unsigned int cpu);
0278 extern int omap4_cpu_kill(unsigned int cpu);
0279 
0280 extern const struct smp_operations omap4_smp_ops;
0281 #endif
0282 
0283 extern u32 omap4_get_cpu1_ns_pa_addr(void);
0284 
0285 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
0286 extern int omap4_mpuss_init(void);
0287 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
0288 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
0289 #else
0290 static inline int omap4_enter_lowpower(unsigned int cpu,
0291                     unsigned int power_state)
0292 {
0293     cpu_do_idle();
0294     return 0;
0295 }
0296 
0297 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
0298 {
0299     cpu_do_idle();
0300     return 0;
0301 }
0302 
0303 static inline int omap4_mpuss_init(void)
0304 {
0305     return 0;
0306 }
0307 
0308 #endif
0309 
0310 #ifdef CONFIG_ARCH_OMAP4
0311 void omap4_secondary_startup(void);
0312 void omap4460_secondary_startup(void);
0313 int omap4_finish_suspend(unsigned long cpu_state);
0314 void omap4_cpu_resume(void);
0315 #else
0316 static inline void omap4_secondary_startup(void)
0317 {
0318 }
0319 
0320 static inline void omap4460_secondary_startup(void)
0321 {
0322 }
0323 static inline int omap4_finish_suspend(unsigned long cpu_state)
0324 {
0325     return 0;
0326 }
0327 static inline void omap4_cpu_resume(void)
0328 {
0329 }
0330 #endif
0331 
0332 #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
0333 void omap5_secondary_startup(void);
0334 void omap5_secondary_hyp_startup(void);
0335 #else
0336 static inline void omap5_secondary_startup(void)
0337 {
0338 }
0339 
0340 static inline void omap5_secondary_hyp_startup(void)
0341 {
0342 }
0343 #endif
0344 
0345 struct omap_system_dma_plat_info;
0346 
0347 void pdata_quirks_init(const struct of_device_id *);
0348 void omap_auxdata_legacy_init(struct device *dev);
0349 void omap_pcs_legacy_init(int irq, void (*rearm)(void));
0350 extern struct omap_system_dma_plat_info dma_plat_info;
0351 
0352 struct omap_sdrc_params;
0353 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
0354                       struct omap_sdrc_params *sdrc_cs1);
0355 extern void omap_reserve(void);
0356 
0357 struct omap_hwmod;
0358 extern int omap_dss_reset(struct omap_hwmod *);
0359 
0360 /* SoC specific clock initializer */
0361 int omap_clk_init(void);
0362 
0363 #if IS_ENABLED(CONFIG_OMAP_IOMMU)
0364 int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
0365                     u8 *pwrst);
0366 #else
0367 static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
0368                           bool request, u8 *pwrst)
0369 {
0370     return 0;
0371 }
0372 #endif
0373 
0374 #endif /* __ASSEMBLER__ */
0375 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
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