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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Clock domain register offsets for TI81XX.
0004  *
0005  * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/
0006  * Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/
0007  */
0008 
0009 #ifndef __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
0010 #define __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H
0011 
0012 /* TI81XX common CM module offsets */
0013 #define TI81XX_CM_ACTIVE_MOD            0x0400  /* 256B */
0014 #define TI81XX_CM_DEFAULT_MOD           0x0500  /* 256B */
0015 #define TI81XX_CM_ALWON_MOD         0x1400  /* 1KB */
0016 #define TI81XX_CM_SGX_MOD           0x0900  /* 256B */
0017 
0018 /* TI816X CM module offsets */
0019 #define TI816X_CM_IVAHD0_MOD            0x0600  /* 256B */
0020 #define TI816X_CM_IVAHD1_MOD            0x0700  /* 256B */
0021 #define TI816X_CM_IVAHD2_MOD            0x0800  /* 256B */
0022 
0023 /* ALWON */
0024 #define TI81XX_CM_ALWON_L3_SLOW_CLKDM       0x0000
0025 #define TI81XX_CM_ALWON_L3_MED_CLKDM        0x0004
0026 #define TI81XX_CM_ETHERNET_CLKDM        0x0004
0027 #define TI81XX_CM_MMU_CLKDM         0x000C
0028 #define TI81XX_CM_MMUCFG_CLKDM          0x0010
0029 #define TI81XX_CM_ALWON_MPU_CLKDM       0x001C
0030 #define TI81XX_CM_ALWON_L3_FAST_CLKDM       0x0030
0031 
0032 /* ACTIVE */
0033 #define TI816X_CM_ACTIVE_GEM_CLKDM      0x0000
0034 
0035 /* IVAHD0 */
0036 #define TI816X_CM_IVAHD0_CLKDM          0x0000
0037 
0038 /* IVAHD1 */
0039 #define TI816X_CM_IVAHD1_CLKDM          0x0000
0040 
0041 /* IVAHD2 */
0042 #define TI816X_CM_IVAHD2_CLKDM          0x0000
0043 
0044 /* SGX */
0045 #define TI816X_CM_SGX_CLKDM         0x0000
0046 
0047 /* DEFAULT */
0048 #define TI816X_CM_DEFAULT_L3_MED_CLKDM      0x0004
0049 #define TI816X_CM_DEFAULT_PCI_CLKDM     0x0010
0050 #define TI816X_CM_DEFAULT_L3_SLOW_CLKDM     0x0014
0051 #define TI816X_CM_DEFAULT_DUCATI_CLKDM      0x0018
0052 #define TI816X_CM_DEFAULT_SATA_CLKDM        0x0060
0053 
0054 #endif