arm/mach-omap2/cm3xxx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP2/3 Clock Management (CM) register definitions
0004  *
0005  * Copyright (C) 2007-2009 Texas Instruments, Inc.
0006  * Copyright (C) 2007-2010 Nokia Corporation
0007  * Paul Walmsley
0008  *
0009  * The CM hardware modules on the OMAP2/3 are quite similar to each
0010  * other.  The CM modules/instances on OMAP4 are quite different, so
0011  * they are handled in a separate file.
0012  */
0013 #ifndef __ARCH_ASM_MACH_OMAP2_CM3XXX_H
0014 #define __ARCH_ASM_MACH_OMAP2_CM3XXX_H
0015
0016 #include "prcm-common.h"
0017 #include "cm2xxx_3xxx.h"
0018
0019 #define OMAP34XX_CM_REGADDR(module, reg)                \
0020             OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
0021
0022
0023 /*
0024  * OMAP3-specific global CM registers
0025  * Use cm_{read,write}_reg() with these registers.
0026  * These registers appear once per CM module.
0027  */
0028
0029 #define OMAP3430_CM_SYSCONFIG       0x0010
0030 #define OMAP3430_CM_POLCTRL     0x009c
0031
0032 #define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070
0033 #define OMAP3430_CM_CLKOUT_CTRL     OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
0034
0035 /*
0036  * Module specific CM register offsets from CM_BASE + domain offset
0037  * Use cm_{read,write}_mod_reg() with these registers.
0038  * These register offsets generally appear in more than one PRCM submodule.
0039  */
0040
0041 /* OMAP3-specific register offsets */
0042
0043 #define OMAP3430_CM_CLKEN_PLL               0x0004
0044 #define OMAP3430ES2_CM_CLKEN2               0x0004
0045 #define OMAP3430ES2_CM_FCLKEN3              0x0008
0046 #define OMAP3430_CM_IDLEST_PLL              CM_IDLEST2
0047 #define OMAP3430_CM_AUTOIDLE_PLL            CM_AUTOIDLE2
0048 #define OMAP3430ES2_CM_AUTOIDLE2_PLL            CM_AUTOIDLE2
0049 #define OMAP3430_CM_CLKSEL1             CM_CLKSEL
0050 #define OMAP3430_CM_CLKSEL1_PLL             CM_CLKSEL
0051 #define OMAP3430_CM_CLKSEL2_PLL             CM_CLKSEL2
0052 #define OMAP3430_CM_SLEEPDEP                CM_CLKSEL2
0053 #define OMAP3430_CM_CLKSEL3             OMAP2_CM_CLKSTCTRL
0054 #define OMAP3430_CM_CLKSTST             0x004c
0055 #define OMAP3430ES2_CM_CLKSEL4              0x004c
0056 #define OMAP3430ES2_CM_CLKSEL5              0x0050
0057 #define OMAP3430_CM_CLKSEL2_EMU             0x0050
0058 #define OMAP3430_CM_CLKSEL3_EMU             0x0054
0059
0060
0061 /* CM_IDLEST bit field values to indicate deasserted IdleReq */
0062
0063 #define OMAP34XX_CM_IDLEST_VAL              1
0064
0065
0066 #ifndef __ASSEMBLER__
0067
0068 extern void omap3_cm_save_context(void);
0069 extern void omap3_cm_restore_context(void);
0070 extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
0071
0072 int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data);
0073
0074 #endif
0075
0076 #endif