arm/mach-omap2/cm2xxx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP2xxx Clock Management (CM) register definitions
0004  *
0005  * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
0006  * Copyright (C) 2007-2010 Nokia Corporation
0007  * Paul Walmsley
0008  *
0009  * The CM hardware modules on the OMAP2/3 are quite similar to each
0010  * other.  The CM modules/instances on OMAP4 are quite different, so
0011  * they are handled in a separate file.
0012  */
0013 #ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_H
0014 #define __ARCH_ASM_MACH_OMAP2_CM2XXX_H
0015
0016 #include "prcm-common.h"
0017 #include "cm2xxx_3xxx.h"
0018
0019 #define OMAP2420_CM_REGADDR(module, reg)                \
0020             OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
0021 #define OMAP2430_CM_REGADDR(module, reg)                \
0022             OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
0023
0024 /*
0025  * Module specific CM register offsets from CM_BASE + domain offset
0026  * Use cm_{read,write}_mod_reg() with these registers.
0027  * These register offsets generally appear in more than one PRCM submodule.
0028  */
0029
0030 /* OMAP2-specific register offsets */
0031
0032 #define OMAP24XX_CM_FCLKEN2             0x0004
0033 #define OMAP24XX_CM_ICLKEN4             0x001c
0034 #define OMAP24XX_CM_AUTOIDLE4               0x003c
0035 #define OMAP24XX_CM_IDLEST4             0x002c
0036
0037 /* CM_IDLEST bit field values to indicate deasserted IdleReq */
0038
0039 #define OMAP24XX_CM_IDLEST_VAL              0
0040
0041
0042 /* Clock management domain register get/set */
0043
0044 #ifndef __ASSEMBLER__
0045
0046 extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
0047 extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
0048
0049 extern void omap2xxx_cm_set_apll54_disable_autoidle(void);
0050 extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
0051 extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
0052 extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
0053
0054 int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
0055                   u8 idlest_shift);
0056 extern int omap2xxx_cm_fclks_active(void);
0057 extern int omap2xxx_cm_mpu_retention_allowed(void);
0058 extern u32 omap2xxx_cm_get_core_clk_src(void);
0059 extern u32 omap2xxx_cm_get_core_pll_config(void);
0060 extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
0061                      u32 mdm);
0062
0063 int __init omap2xxx_cm_init(const struct omap_prcm_init_data *data);
0064
0065 #endif
0066
0067 #endif