arm/mach-omap2/cm2_54xx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP54xx CM2 instance offset macros
0004  *
0005  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
0006  *
0007  * Paul Walmsley (paul@pwsan.com)
0008  * Rajendra Nayak (rnayak@ti.com)
0009  * Benoit Cousson (b-cousson@ti.com)
0010  *
0011  * This file is automatically generated from the OMAP hardware databases.
0012  * We respectfully ask that any modifications to this file be coordinated
0013  * with the public linux-omap@vger.kernel.org mailing list and the
0014  * authors above to ensure that the autogeneration scripts are kept
0015  * up-to-date with the file contents.
0016  */
0017
0018 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
0019 #define __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
0020
0021 /* CM2 base address */
0022 #define OMAP54XX_CM_CORE_BASE       0x4a008000
0023
0024 #define OMAP54XX_CM_CORE_REGADDR(inst, reg)             \
0025     OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE + (inst) + (reg))
0026
0027 /* CM_CORE instances */
0028 #define OMAP54XX_CM_CORE_OCP_SOCKET_INST    0x0000
0029 #define OMAP54XX_CM_CORE_CKGEN_INST     0x0100
0030 #define OMAP54XX_CM_CORE_COREAON_INST       0x0600
0031 #define OMAP54XX_CM_CORE_CORE_INST      0x0700
0032 #define OMAP54XX_CM_CORE_IVA_INST       0x1200
0033 #define OMAP54XX_CM_CORE_CAM_INST       0x1300
0034 #define OMAP54XX_CM_CORE_DSS_INST       0x1400
0035 #define OMAP54XX_CM_CORE_GPU_INST       0x1500
0036 #define OMAP54XX_CM_CORE_L3INIT_INST        0x1600
0037 #define OMAP54XX_CM_CORE_CUSTEFUSE_INST     0x1700
0038
0039 /* CM_CORE clockdomain register offsets (from instance start) */
0040 #define OMAP54XX_CM_CORE_COREAON_COREAON_CDOFFS     0x0000
0041 #define OMAP54XX_CM_CORE_CORE_L3MAIN1_CDOFFS        0x0000
0042 #define OMAP54XX_CM_CORE_CORE_L3MAIN2_CDOFFS        0x0100
0043 #define OMAP54XX_CM_CORE_CORE_IPU_CDOFFS        0x0200
0044 #define OMAP54XX_CM_CORE_CORE_DMA_CDOFFS        0x0300
0045 #define OMAP54XX_CM_CORE_CORE_EMIF_CDOFFS       0x0400
0046 #define OMAP54XX_CM_CORE_CORE_C2C_CDOFFS        0x0500
0047 #define OMAP54XX_CM_CORE_CORE_L4CFG_CDOFFS      0x0600
0048 #define OMAP54XX_CM_CORE_CORE_L3INSTR_CDOFFS        0x0700
0049 #define OMAP54XX_CM_CORE_CORE_MIPIEXT_CDOFFS        0x0800
0050 #define OMAP54XX_CM_CORE_CORE_L4PER_CDOFFS      0x0900
0051 #define OMAP54XX_CM_CORE_CORE_L4SEC_CDOFFS      0x0a80
0052 #define OMAP54XX_CM_CORE_IVA_IVA_CDOFFS         0x0000
0053 #define OMAP54XX_CM_CORE_CAM_CAM_CDOFFS         0x0000
0054 #define OMAP54XX_CM_CORE_DSS_DSS_CDOFFS         0x0000
0055 #define OMAP54XX_CM_CORE_GPU_GPU_CDOFFS         0x0000
0056 #define OMAP54XX_CM_CORE_L3INIT_L3INIT_CDOFFS       0x0000
0057 #define OMAP54XX_CM_CORE_CUSTEFUSE_CUSTEFUSE_CDOFFS 0x0000
0058
0059 #endif