arm/mach-omap2/cm1_54xx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP54xx CM1 instance offset macros
0004  *
0005  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
0006  *
0007  * Paul Walmsley (paul@pwsan.com)
0008  * Rajendra Nayak (rnayak@ti.com)
0009  * Benoit Cousson (b-cousson@ti.com)
0010  *
0011  * This file is automatically generated from the OMAP hardware databases.
0012  * We respectfully ask that any modifications to this file be coordinated
0013  * with the public linux-omap@vger.kernel.org mailing list and the
0014  * authors above to ensure that the autogeneration scripts are kept
0015  * up-to-date with the file contents.
0016  */
0017
0018 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
0019 #define __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
0020
0021 /* CM1 base address */
0022 #define OMAP54XX_CM_CORE_AON_BASE       0x4a004000
0023
0024 #define OMAP54XX_CM_CORE_AON_REGADDR(inst, reg)             \
0025     OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE + (inst) + (reg))
0026
0027 /* CM_CORE_AON instances */
0028 #define OMAP54XX_CM_CORE_AON_OCP_SOCKET_INST    0x0000
0029 #define OMAP54XX_CM_CORE_AON_CKGEN_INST     0x0100
0030 #define OMAP54XX_CM_CORE_AON_MPU_INST       0x0300
0031 #define OMAP54XX_CM_CORE_AON_DSP_INST       0x0400
0032 #define OMAP54XX_CM_CORE_AON_ABE_INST       0x0500
0033
0034 /* CM_CORE_AON clockdomain register offsets (from instance start) */
0035 #define OMAP54XX_CM_CORE_AON_MPU_MPU_CDOFFS 0x0000
0036 #define OMAP54XX_CM_CORE_AON_DSP_DSP_CDOFFS 0x0000
0037 #define OMAP54XX_CM_CORE_AON_ABE_ABE_CDOFFS 0x0000
0038
0039 #endif