arm/mach-omap2/cm.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * OMAP2+ Clock Management prototypes
0004  *
0005  * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
0006  * Copyright (C) 2007-2009 Nokia Corporation
0007  *
0008  * Written by Paul Walmsley
0009  */
0010 #ifndef __ARCH_ASM_MACH_OMAP2_CM_H
0011 #define __ARCH_ASM_MACH_OMAP2_CM_H
0012
0013 /*
0014  * MAX_MODULE_READY_TIME: max duration in microseconds to wait for the
0015  * PRCM to request that a module exit the inactive state in the case of
0016  * OMAP2 & 3.
0017  * In the case of OMAP4 this is the max duration in microseconds for the
0018  * module to reach the functionnal state from an inactive state.
0019  */
0020 #define MAX_MODULE_READY_TIME       2000
0021
0022 # ifndef __ASSEMBLER__
0023 #include <linux/clk/ti.h>
0024
0025 #include "prcm-common.h"
0026
0027 extern struct omap_domain_base cm_base;
0028 extern struct omap_domain_base cm2_base;
0029 # endif
0030
0031 /*
0032  * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
0033  * the PRCM to request that a module enter the inactive state in the
0034  * case of OMAP2 & 3.  In the case of OMAP4 this is the max duration
0035  * in microseconds for the module to reach the inactive state from
0036  * a functional state.
0037  * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
0038  * kernel init.
0039  */
0040 #define MAX_MODULE_DISABLE_TIME     5000
0041
0042 # ifndef __ASSEMBLER__
0043
0044 /**
0045  * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
0046  * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
0047  * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
0048  * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
0049  * @module_enable: ptr to the SoC CM-specific module_enable impl
0050  * @module_disable: ptr to the SoC CM-specific module_disable impl
0051  * @xlate_clkctrl: ptr to the SoC CM-specific clkctrl xlate addr impl
0052  */
0053 struct cm_ll_data {
0054     int (*split_idlest_reg)(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
0055                 u8 *idlest_reg_id);
0056     int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
0057                  u8 idlest_shift);
0058     int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
0059                 u8 idlest_shift);
0060     void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
0061     void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
0062     u32 (*xlate_clkctrl)(u8 part, u16 inst, u16 clkctrl_offs);
0063 };
0064
0065 extern int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
0066                    u8 *idlest_reg_id);
0067 int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
0068                   u8 idlest_shift);
0069 int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
0070                  u8 idlest_shift);
0071 int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
0072 int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
0073 u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs);
0074 extern int cm_register(const struct cm_ll_data *cld);
0075 extern int cm_unregister(const struct cm_ll_data *cld);
0076 int omap_cm_init(void);
0077 int omap2_cm_base_init(void);
0078
0079 # endif
0080
0081 #endif