arm/mach-omap2/cm-regbits-7xx.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * DRA7xx Clock Management register bits
0004  *
0005  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
0006  *
0007  * Generated by code originally written by:
0008  * Paul Walmsley (paul@pwsan.com)
0009  * Rajendra Nayak (rnayak@ti.com)
0010  * Benoit Cousson (b-cousson@ti.com)
0011  *
0012  * This file is automatically generated from the OMAP hardware databases.
0013  * We respectfully ask that any modifications to this file be coordinated
0014  * with the public linux-omap@vger.kernel.org mailing list and the
0015  * authors above to ensure that the autogeneration scripts are kept
0016  * up-to-date with the file contents.
0017  */
0018
0019 #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
0020 #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_7XX_H
0021
0022 #define DRA7XX_ATL_STATDEP_SHIFT                30
0023 #define DRA7XX_CAM_STATDEP_SHIFT                9
0024 #define DRA7XX_DSP1_STATDEP_SHIFT               1
0025 #define DRA7XX_DSP2_STATDEP_SHIFT               18
0026 #define DRA7XX_DSS_STATDEP_SHIFT                8
0027 #define DRA7XX_EMIF_STATDEP_SHIFT               4
0028 #define DRA7XX_EVE1_STATDEP_SHIFT               19
0029 #define DRA7XX_EVE2_STATDEP_SHIFT               20
0030 #define DRA7XX_EVE3_STATDEP_SHIFT               21
0031 #define DRA7XX_EVE4_STATDEP_SHIFT               22
0032 #define DRA7XX_GMAC_STATDEP_SHIFT               25
0033 #define DRA7XX_GPU_STATDEP_SHIFT                10
0034 #define DRA7XX_IPU1_STATDEP_SHIFT               23
0035 #define DRA7XX_IPU2_STATDEP_SHIFT               0
0036 #define DRA7XX_IPU_STATDEP_SHIFT                24
0037 #define DRA7XX_IVA_STATDEP_SHIFT                2
0038 #define DRA7XX_L3INIT_STATDEP_SHIFT             7
0039 #define DRA7XX_L3MAIN1_STATDEP_SHIFT                5
0040 #define DRA7XX_L4CFG_STATDEP_SHIFT              12
0041 #define DRA7XX_L4PER2_STATDEP_SHIFT             26
0042 #define DRA7XX_L4PER3_STATDEP_SHIFT             27
0043 #define DRA7XX_L4PER_STATDEP_SHIFT              13
0044 #define DRA7XX_L4SEC_STATDEP_SHIFT              14
0045 #define DRA7XX_PCIE_STATDEP_SHIFT               29
0046 #define DRA7XX_VPE_STATDEP_SHIFT                28
0047 #define DRA7XX_WKUPAON_STATDEP_SHIFT                15
0048 #endif