arm/mach-omap2/clkt2xxx_dpll.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * OMAP2-specific DPLL control functions
0004  *
0005  * Copyright (C) 2011 Nokia Corporation
0006  * Paul Walmsley
0007  */
0008
0009 #include <linux/kernel.h>
0010 #include <linux/errno.h>
0011 #include <linux/clk.h>
0012 #include <linux/io.h>
0013
0014 #include "clock.h"
0015 #include "cm2xxx.h"
0016 #include "cm-regbits-24xx.h"
0017
0018 /* Private functions */
0019
0020 /**
0021  * _allow_idle - enable DPLL autoidle bits
0022  * @clk: struct clk * of the DPLL to operate on
0023  *
0024  * Enable DPLL automatic idle control.  The DPLL will enter low-power
0025  * stop when its downstream clocks are gated.  No return value.
0026  * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1
0027  * instead.  Add some mechanism to optionally enter this mode.
0028  */
0029 static void _allow_idle(struct clk_hw_omap *clk)
0030 {
0031     if (!clk || !clk->dpll_data)
0032         return;
0033
0034     omap2xxx_cm_set_dpll_auto_low_power_stop();
0035 }
0036
0037 /**
0038  * _deny_idle - prevent DPLL from automatically idling
0039  * @clk: struct clk * of the DPLL to operate on
0040  *
0041  * Disable DPLL automatic idle control.  No return value.
0042  */
0043 static void _deny_idle(struct clk_hw_omap *clk)
0044 {
0045     if (!clk || !clk->dpll_data)
0046         return;
0047
0048     omap2xxx_cm_set_dpll_disable_autoidle();
0049 }
0050
0051
0052 /* Public data */
0053 const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll = {
0054     .allow_idle = _allow_idle,
0055     .deny_idle  = _deny_idle,
0056 };