0001 # SPDX-License-Identifier: GPL-2.0-only
0002 menu "TI OMAP/AM/DM/DRA Family"
0003 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
0004
0005 config OMAP_HWMOD
0006 bool
0007
0008 config ARCH_OMAP2
0009 bool "TI OMAP2"
0010 depends on ARCH_MULTI_V6
0011 select ARCH_OMAP2PLUS
0012 select CPU_V6
0013 select OMAP_HWMOD
0014 select SOC_HAS_OMAP2_SDRC
0015
0016 config ARCH_OMAP3
0017 bool "TI OMAP3"
0018 depends on ARCH_MULTI_V7
0019 select ARCH_OMAP2PLUS
0020 select ARM_CPU_SUSPEND
0021 select OMAP_HWMOD
0022 select OMAP_INTERCONNECT
0023 select PM_OPP
0024 select SOC_HAS_OMAP2_SDRC
0025 select ARM_ERRATA_430973
0026
0027 config ARCH_OMAP4
0028 bool "TI OMAP4"
0029 depends on ARCH_MULTI_V7
0030 select ARCH_OMAP2PLUS
0031 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
0032 select ARM_CPU_SUSPEND
0033 select ARM_ERRATA_720789
0034 select ARM_GIC
0035 select HAVE_ARM_SCU if SMP
0036 select HAVE_ARM_TWD if SMP
0037 select OMAP_INTERCONNECT
0038 select OMAP_INTERCONNECT_BARRIER
0039 select PL310_ERRATA_588369 if CACHE_L2X0
0040 select PL310_ERRATA_727915 if CACHE_L2X0
0041 select PM_OPP
0042 select PM if CPU_IDLE
0043 select ARM_ERRATA_754322
0044 select ARM_ERRATA_775420
0045 select OMAP_INTERCONNECT
0046
0047 config SOC_OMAP5
0048 bool "TI OMAP5"
0049 depends on ARCH_MULTI_V7
0050 select ARCH_OMAP2PLUS
0051 select ARM_CPU_SUSPEND
0052 select ARM_GIC
0053 select HAVE_ARM_SCU if SMP
0054 select HAVE_ARM_ARCH_TIMER
0055 select ARM_ERRATA_798181 if SMP
0056 select OMAP_INTERCONNECT
0057 select OMAP_INTERCONNECT_BARRIER
0058 select PM_OPP
0059 select ZONE_DMA if ARM_LPAE
0060
0061 config SOC_AM33XX
0062 bool "TI AM33XX"
0063 depends on ARCH_MULTI_V7
0064 select ARCH_OMAP2PLUS
0065 select ARM_CPU_SUSPEND
0066
0067 config SOC_AM43XX
0068 bool "TI AM43x"
0069 depends on ARCH_MULTI_V7
0070 select ARCH_OMAP2PLUS
0071 select ARM_GIC
0072 select MACH_OMAP_GENERIC
0073 select HAVE_ARM_SCU
0074 select GENERIC_CLOCKEVENTS_BROADCAST
0075 select HAVE_ARM_TWD
0076 select ARM_ERRATA_754322
0077 select ARM_ERRATA_775420
0078 select OMAP_INTERCONNECT
0079 select ARM_CPU_SUSPEND
0080
0081 config SOC_DRA7XX
0082 bool "TI DRA7XX"
0083 depends on ARCH_MULTI_V7
0084 select ARCH_OMAP2PLUS
0085 select ARM_CPU_SUSPEND
0086 select ARM_GIC
0087 select HAVE_ARM_SCU if SMP
0088 select HAVE_ARM_ARCH_TIMER
0089 select IRQ_CROSSBAR
0090 select ARM_ERRATA_798181 if SMP
0091 select OMAP_INTERCONNECT
0092 select OMAP_INTERCONNECT_BARRIER
0093 select PM_OPP
0094 select ZONE_DMA if ARM_LPAE
0095 select PINCTRL_TI_IODELAY if OF && PINCTRL
0096
0097 config ARCH_OMAP2PLUS
0098 bool
0099 select ARCH_HAS_BANDGAP
0100 select ARCH_HAS_RESET_CONTROLLER
0101 select ARCH_OMAP
0102 select CLKSRC_MMIO
0103 select GENERIC_IRQ_CHIP
0104 select GPIOLIB
0105 select MACH_OMAP_GENERIC
0106 select MEMORY
0107 select MFD_SYSCON
0108 select OMAP_DM_SYSTIMER
0109 select OMAP_DM_TIMER
0110 select OMAP_GPMC
0111 select PINCTRL
0112 select PM
0113 select PM_GENERIC_DOMAINS
0114 select PM_GENERIC_DOMAINS_OF
0115 select RESET_CONTROLLER
0116 select SOC_BUS
0117 select TI_SYSC
0118 select OMAP_IRQCHIP
0119 select CLKSRC_TI_32K
0120 help
0121 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
0122
0123 config OMAP_INTERCONNECT_BARRIER
0124 bool
0125 select ARM_HEAVY_MB
0126
0127 config ARCH_OMAP
0128 bool
0129
0130 if ARCH_OMAP2PLUS
0131
0132 menu "TI OMAP2/3/4 Specific Features"
0133
0134 config ARCH_OMAP2PLUS_TYPICAL
0135 bool "Typical OMAP configuration"
0136 default y
0137 select AEABI
0138 select HIGHMEM
0139 select I2C
0140 select I2C_OMAP
0141 select MENELAUS if ARCH_OMAP2
0142 select NEON if CPU_V7
0143 select REGULATOR
0144 select REGULATOR_FIXED_VOLTAGE
0145 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
0146 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
0147 select VFP
0148 help
0149 Compile a kernel suitable for booting most boards
0150
0151 config SOC_HAS_OMAP2_SDRC
0152 bool "OMAP2 SDRAM Controller support"
0153
0154 config SOC_HAS_REALTIME_COUNTER
0155 bool "Real time free running counter"
0156 depends on SOC_OMAP5 || SOC_DRA7XX
0157 default y
0158
0159 config POWER_AVS_OMAP
0160 bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
0161 depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
0162 select POWER_SUPPLY
0163 help
0164 Say Y to enable AVS(Adaptive Voltage Scaling)
0165 support on OMAP containing the version 1 or
0166 version 2 of the SmartReflex IP.
0167 V1 is the 65nm version used in OMAP3430.
0168 V2 is the update for the 45nm version of the IP used in OMAP3630
0169 and OMAP4430
0170
0171 Please note, that by default SmartReflex is only
0172 initialized and not enabled. To enable the automatic voltage
0173 compensation for vdd mpu and vdd core from user space,
0174 user must write 1 to
0175 /debug/smartreflex/sr_<X>/autocomp,
0176 where X is mpu_iva or core for OMAP3.
0177 Optionally autocompensation can be enabled in the kernel
0178 by default during system init via the enable_on_init flag
0179 which an be passed as platform data to the smartreflex driver.
0180
0181 config POWER_AVS_OMAP_CLASS3
0182 bool "Class 3 mode of Smartreflex Implementation"
0183 depends on POWER_AVS_OMAP && TWL4030_CORE
0184 help
0185 Say Y to enable Class 3 implementation of Smartreflex
0186
0187 Class 3 implementation of Smartreflex employs continuous hardware
0188 voltage calibration.
0189
0190 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
0191 bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
0192 depends on ARCH_OMAP3 && PM
0193 help
0194 Without this option, L2 Auxiliary control register contents are
0195 lost during off-mode entry on HS/EMU devices. This feature
0196 requires support from PPA / boot-loader in HS/EMU devices, which
0197 currently does not exist by default.
0198
0199 config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
0200 int "Service ID for the support routine to set L2 AUX control"
0201 depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE
0202 default 43
0203 help
0204 PPA routine service ID for setting L2 auxiliary control register.
0205
0206 comment "OMAP Core Type"
0207 depends on ARCH_OMAP2
0208
0209 config SOC_OMAP2420
0210 bool "OMAP2420 support"
0211 depends on ARCH_OMAP2
0212 default y
0213 select OMAP_DM_SYSTIMER
0214 select OMAP_DM_TIMER
0215 select SOC_HAS_OMAP2_SDRC
0216
0217 config SOC_OMAP2430
0218 bool "OMAP2430 support"
0219 depends on ARCH_OMAP2
0220 default y
0221 select SOC_HAS_OMAP2_SDRC
0222
0223 config SOC_OMAP3430
0224 bool "OMAP3430 support"
0225 depends on ARCH_OMAP3
0226 default y
0227 select SOC_HAS_OMAP2_SDRC
0228
0229 config SOC_TI81XX
0230 bool "TI81XX support"
0231 depends on ARCH_OMAP3
0232 default y
0233
0234 comment "OMAP Legacy Platform Data Board Type"
0235 depends on ARCH_OMAP2PLUS
0236
0237 config MACH_OMAP_GENERIC
0238 bool
0239
0240 config MACH_OMAP2_TUSB6010
0241 bool
0242 depends on ARCH_OMAP2 && SOC_OMAP2420
0243 default y if MACH_NOKIA_N8X0
0244
0245 config MACH_NOKIA_N810
0246 bool
0247
0248 config MACH_NOKIA_N810_WIMAX
0249 bool
0250
0251 config MACH_NOKIA_N8X0
0252 bool "Nokia N800/N810"
0253 depends on SOC_OMAP2420
0254 default y
0255 select MACH_NOKIA_N810
0256 select MACH_NOKIA_N810_WIMAX
0257
0258 config OMAP3_SDRC_AC_TIMING
0259 bool "Enable SDRC AC timing register changes"
0260 depends on ARCH_OMAP3
0261 help
0262 If you know that none of your system initiators will attempt to
0263 access SDRAM during CORE DVFS, select Y here. This should boost
0264 SDRAM performance at lower CORE OPPs. There are relatively few
0265 users who will wish to say yes at this point - almost everyone will
0266 wish to say no. Selecting yes without understanding what is
0267 going on could result in system crashes;
0268
0269 endmenu
0270
0271 endif
0272
0273 config OMAP5_ERRATA_801819
0274 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
0275 depends on SOC_OMAP5 || SOC_DRA7XX
0276 help
0277 A livelock can occur in the L2 cache arbitration that might prevent
0278 a snoop from completing. Under certain conditions this can cause the
0279 system to deadlock.
0280
0281 endmenu
