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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Platform level USB initialization for FS USB OTG controller on omap1
0004  *
0005  * Copyright (C) 2004 Texas Instruments, Inc.
0006  */
0007 
0008 #include <linux/module.h>
0009 #include <linux/kernel.h>
0010 #include <linux/init.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/dma-map-ops.h>
0013 #include <linux/io.h>
0014 #include <linux/delay.h>
0015 #include <linux/soc/ti/omap1-io.h>
0016 
0017 #include <asm/irq.h>
0018 
0019 #include "hardware.h"
0020 #include "mux.h"
0021 #include "usb.h"
0022 #include "common.h"
0023 
0024 /* These routines should handle the standard chip-specific modes
0025  * for usb0/1/2 ports, covering basic mux and transceiver setup.
0026  *
0027  * Some board-*.c files will need to set up additional mux options,
0028  * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
0029  */
0030 
0031 /* TESTED ON:
0032  *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
0033  *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
0034  *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
0035  *  - 1510 Innovator UDC with bundled usb0 cable
0036  *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
0037  *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
0038  *  - 1710 custom development board using alternate pin group
0039  *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
0040  */
0041 
0042 #define INT_USB_IRQ_GEN     IH2_BASE + 20
0043 #define INT_USB_IRQ_NISO    IH2_BASE + 30
0044 #define INT_USB_IRQ_ISO     IH2_BASE + 29
0045 #define INT_USB_IRQ_HGEN    INT_USB_HHC_1
0046 #define INT_USB_IRQ_OTG     IH2_BASE + 8
0047 
0048 #ifdef  CONFIG_ARCH_OMAP_OTG
0049 
0050 static void __init
0051 omap_otg_init(struct omap_usb_config *config)
0052 {
0053     u32     syscon;
0054     int     alt_pingroup = 0;
0055     u16     w;
0056 
0057     /* NOTE:  no bus or clock setup (yet?) */
0058 
0059     syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
0060     if (!(syscon & OTG_RESET_DONE))
0061         pr_debug("USB resets not complete?\n");
0062 
0063     //omap_writew(0, OTG_IRQ_EN);
0064 
0065     /* pin muxing and transceiver pinouts */
0066     if (config->pins[0] > 2)    /* alt pingroup 2 */
0067         alt_pingroup = 1;
0068     syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
0069     syscon |= config->usb1_init(config->pins[1]);
0070     syscon |= config->usb2_init(config->pins[2], alt_pingroup);
0071     pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
0072     omap_writel(syscon, OTG_SYSCON_1);
0073 
0074     syscon = config->hmc_mode;
0075     syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
0076 #ifdef  CONFIG_USB_OTG
0077     if (config->otg)
0078         syscon |= OTG_EN;
0079 #endif
0080     pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
0081          omap_readl(USB_TRANSCEIVER_CTRL));
0082     pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
0083     omap_writel(syscon, OTG_SYSCON_2);
0084 
0085     printk("USB: hmc %d", config->hmc_mode);
0086     if (!alt_pingroup)
0087         pr_cont(", usb2 alt %d wires", config->pins[2]);
0088     else if (config->pins[0])
0089         pr_cont(", usb0 %d wires%s", config->pins[0],
0090             is_usb0_device(config) ? " (dev)" : "");
0091     if (config->pins[1])
0092         pr_cont(", usb1 %d wires", config->pins[1]);
0093     if (!alt_pingroup && config->pins[2])
0094         pr_cont(", usb2 %d wires", config->pins[2]);
0095     if (config->otg)
0096         pr_cont(", Mini-AB on usb%d", config->otg - 1);
0097     pr_cont("\n");
0098 
0099     /* leave USB clocks/controllers off until needed */
0100     w = omap_readw(ULPD_SOFT_REQ);
0101     w &= ~SOFT_USB_CLK_REQ;
0102     omap_writew(w, ULPD_SOFT_REQ);
0103 
0104     w = omap_readw(ULPD_CLOCK_CTRL);
0105     w &= ~USB_MCLK_EN;
0106     w |= DIS_USB_PVCI_CLK;
0107     omap_writew(w, ULPD_CLOCK_CTRL);
0108 
0109     syscon = omap_readl(OTG_SYSCON_1);
0110     syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
0111 
0112 #if IS_ENABLED(CONFIG_USB_OMAP)
0113     if (config->otg || config->register_dev) {
0114         struct platform_device *udc_device = config->udc_device;
0115         int status;
0116 
0117         syscon &= ~DEV_IDLE_EN;
0118         udc_device->dev.platform_data = config;
0119         status = platform_device_register(udc_device);
0120         if (status)
0121             pr_debug("can't register UDC device, %d\n", status);
0122     }
0123 #endif
0124 
0125 #if IS_ENABLED(CONFIG_USB_OHCI_HCD)
0126     if (config->otg || config->register_host) {
0127         struct platform_device *ohci_device = config->ohci_device;
0128         int status;
0129 
0130         syscon &= ~HST_IDLE_EN;
0131         ohci_device->dev.platform_data = config;
0132         status = platform_device_register(ohci_device);
0133         if (status)
0134             pr_debug("can't register OHCI device, %d\n", status);
0135     }
0136 #endif
0137 
0138 #ifdef  CONFIG_USB_OTG
0139     if (config->otg) {
0140         struct platform_device *otg_device = config->otg_device;
0141         int status;
0142 
0143         syscon &= ~OTG_IDLE_EN;
0144         otg_device->dev.platform_data = config;
0145         status = platform_device_register(otg_device);
0146         if (status)
0147             pr_debug("can't register OTG device, %d\n", status);
0148     }
0149 #endif
0150     pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
0151     omap_writel(syscon, OTG_SYSCON_1);
0152 }
0153 
0154 #else
0155 static void omap_otg_init(struct omap_usb_config *config) {}
0156 #endif
0157 
0158 #if IS_ENABLED(CONFIG_USB_OMAP)
0159 
0160 static struct resource udc_resources[] = {
0161     /* order is significant! */
0162     {       /* registers */
0163         .start      = UDC_BASE,
0164         .end        = UDC_BASE + 0xff,
0165         .flags      = IORESOURCE_MEM,
0166     }, {        /* general IRQ */
0167         .start      = INT_USB_IRQ_GEN,
0168         .flags      = IORESOURCE_IRQ,
0169     }, {        /* PIO IRQ */
0170         .start      = INT_USB_IRQ_NISO,
0171         .flags      = IORESOURCE_IRQ,
0172     }, {        /* SOF IRQ */
0173         .start      = INT_USB_IRQ_ISO,
0174         .flags      = IORESOURCE_IRQ,
0175     },
0176 };
0177 
0178 static u64 udc_dmamask = ~(u32)0;
0179 
0180 static struct platform_device udc_device = {
0181     .name       = "omap_udc",
0182     .id     = -1,
0183     .dev = {
0184         .dma_mask       = &udc_dmamask,
0185         .coherent_dma_mask  = 0xffffffff,
0186     },
0187     .num_resources  = ARRAY_SIZE(udc_resources),
0188     .resource   = udc_resources,
0189 };
0190 
0191 static inline void udc_device_init(struct omap_usb_config *pdata)
0192 {
0193     /* IRQ numbers for omap7xx */
0194     if(cpu_is_omap7xx()) {
0195         udc_resources[1].start = INT_7XX_USB_GENI;
0196         udc_resources[2].start = INT_7XX_USB_NON_ISO;
0197         udc_resources[3].start = INT_7XX_USB_ISO;
0198     }
0199     pdata->udc_device = &udc_device;
0200 }
0201 
0202 #else
0203 
0204 static inline void udc_device_init(struct omap_usb_config *pdata)
0205 {
0206 }
0207 
0208 #endif
0209 
0210 /* The dmamask must be set for OHCI to work */
0211 static u64 ohci_dmamask = ~(u32)0;
0212 
0213 static struct resource ohci_resources[] = {
0214     {
0215         .start  = OMAP_OHCI_BASE,
0216         .end    = OMAP_OHCI_BASE + 0xff,
0217         .flags  = IORESOURCE_MEM,
0218     },
0219     {
0220         .start  = INT_USB_IRQ_HGEN,
0221         .flags  = IORESOURCE_IRQ,
0222     },
0223 };
0224 
0225 static struct platform_device ohci_device = {
0226     .name           = "ohci",
0227     .id         = -1,
0228     .dev = {
0229         .dma_mask       = &ohci_dmamask,
0230         .coherent_dma_mask  = 0xffffffff,
0231     },
0232     .num_resources  = ARRAY_SIZE(ohci_resources),
0233     .resource       = ohci_resources,
0234 };
0235 
0236 static inline void ohci_device_init(struct omap_usb_config *pdata)
0237 {
0238     if (!IS_ENABLED(CONFIG_USB_OHCI_HCD))
0239         return;
0240 
0241     if (cpu_is_omap7xx())
0242         ohci_resources[1].start = INT_7XX_USB_HHC_1;
0243     pdata->ohci_device = &ohci_device;
0244     pdata->ocpi_enable = &ocpi_enable;
0245 }
0246 
0247 #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
0248 
0249 static struct resource otg_resources[] = {
0250     /* order is significant! */
0251     {
0252         .start      = OTG_BASE,
0253         .end        = OTG_BASE + 0xff,
0254         .flags      = IORESOURCE_MEM,
0255     }, {
0256         .start      = INT_USB_IRQ_OTG,
0257         .flags      = IORESOURCE_IRQ,
0258     },
0259 };
0260 
0261 static struct platform_device otg_device = {
0262     .name       = "omap_otg",
0263     .id     = -1,
0264     .num_resources  = ARRAY_SIZE(otg_resources),
0265     .resource   = otg_resources,
0266 };
0267 
0268 static inline void otg_device_init(struct omap_usb_config *pdata)
0269 {
0270     if (cpu_is_omap7xx())
0271         otg_resources[1].start = INT_7XX_USB_OTG;
0272     pdata->otg_device = &otg_device;
0273 }
0274 
0275 #else
0276 
0277 static inline void otg_device_init(struct omap_usb_config *pdata)
0278 {
0279 }
0280 
0281 #endif
0282 
0283 static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
0284 {
0285     u32 syscon1 = 0;
0286 
0287     if (nwires == 0) {
0288         if (!cpu_is_omap15xx()) {
0289             u32 l;
0290 
0291             /* pulldown D+/D- */
0292             l = omap_readl(USB_TRANSCEIVER_CTRL);
0293             l &= ~(3 << 1);
0294             omap_writel(l, USB_TRANSCEIVER_CTRL);
0295         }
0296         return 0;
0297     }
0298 
0299     if (is_device) {
0300         if (cpu_is_omap7xx()) {
0301             omap_cfg_reg(AA17_7XX_USB_DM);
0302             omap_cfg_reg(W16_7XX_USB_PU_EN);
0303             omap_cfg_reg(W17_7XX_USB_VBUSI);
0304             omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
0305             omap_cfg_reg(W19_7XX_USB_DCRST);
0306         } else
0307             omap_cfg_reg(W4_USB_PUEN);
0308     }
0309 
0310     if (nwires == 2) {
0311         u32 l;
0312 
0313         // omap_cfg_reg(P9_USB_DP);
0314         // omap_cfg_reg(R8_USB_DM);
0315 
0316         if (cpu_is_omap15xx()) {
0317             /* This works on 1510-Innovator */
0318             return 0;
0319         }
0320 
0321         /* NOTES:
0322          *  - peripheral should configure VBUS detection!
0323          *  - only peripherals may use the internal D+/D- pulldowns
0324          *  - OTG support on this port not yet written
0325          */
0326 
0327         /* Don't do this for omap7xx -- it causes USB to not work correctly */
0328         if (!cpu_is_omap7xx()) {
0329             l = omap_readl(USB_TRANSCEIVER_CTRL);
0330             l &= ~(7 << 4);
0331             if (!is_device)
0332                 l |= (3 << 1);
0333             omap_writel(l, USB_TRANSCEIVER_CTRL);
0334         }
0335 
0336         return 3 << 16;
0337     }
0338 
0339     /* alternate pin config, external transceiver */
0340     if (cpu_is_omap15xx()) {
0341         printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
0342         return 0;
0343     }
0344 
0345     omap_cfg_reg(V6_USB0_TXD);
0346     omap_cfg_reg(W9_USB0_TXEN);
0347     omap_cfg_reg(W5_USB0_SE0);
0348     if (nwires != 3)
0349         omap_cfg_reg(Y5_USB0_RCV);
0350 
0351     /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
0352      * may be able to use I2C requests to set those bits along
0353      * with VBUS switching and overcurrent detection.
0354      */
0355 
0356     if (nwires != 6) {
0357         u32 l;
0358 
0359         l = omap_readl(USB_TRANSCEIVER_CTRL);
0360         l &= ~CONF_USB2_UNI_R;
0361         omap_writel(l, USB_TRANSCEIVER_CTRL);
0362     }
0363 
0364     switch (nwires) {
0365     case 3:
0366         syscon1 = 2;
0367         break;
0368     case 4:
0369         syscon1 = 1;
0370         break;
0371     case 6:
0372         syscon1 = 3;
0373         {
0374             u32 l;
0375 
0376             omap_cfg_reg(AA9_USB0_VP);
0377             omap_cfg_reg(R9_USB0_VM);
0378             l = omap_readl(USB_TRANSCEIVER_CTRL);
0379             l |= CONF_USB2_UNI_R;
0380             omap_writel(l, USB_TRANSCEIVER_CTRL);
0381         }
0382         break;
0383     default:
0384         printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
0385             0, nwires);
0386     }
0387 
0388     return syscon1 << 16;
0389 }
0390 
0391 static u32 __init omap1_usb1_init(unsigned nwires)
0392 {
0393     u32 syscon1 = 0;
0394 
0395     if (!cpu_is_omap15xx() && nwires != 6) {
0396         u32 l;
0397 
0398         l = omap_readl(USB_TRANSCEIVER_CTRL);
0399         l &= ~CONF_USB1_UNI_R;
0400         omap_writel(l, USB_TRANSCEIVER_CTRL);
0401     }
0402     if (nwires == 0)
0403         return 0;
0404 
0405     /* external transceiver */
0406     omap_cfg_reg(USB1_TXD);
0407     omap_cfg_reg(USB1_TXEN);
0408     if (nwires != 3)
0409         omap_cfg_reg(USB1_RCV);
0410 
0411     if (cpu_is_omap15xx()) {
0412         omap_cfg_reg(USB1_SEO);
0413         omap_cfg_reg(USB1_SPEED);
0414         // SUSP
0415     } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
0416         omap_cfg_reg(W13_1610_USB1_SE0);
0417         omap_cfg_reg(R13_1610_USB1_SPEED);
0418         // SUSP
0419     } else if (cpu_is_omap1710()) {
0420         omap_cfg_reg(R13_1710_USB1_SE0);
0421         // SUSP
0422     } else {
0423         pr_debug("usb%d cpu unrecognized\n", 1);
0424         return 0;
0425     }
0426 
0427     switch (nwires) {
0428     case 2:
0429         goto bad;
0430     case 3:
0431         syscon1 = 2;
0432         break;
0433     case 4:
0434         syscon1 = 1;
0435         break;
0436     case 6:
0437         syscon1 = 3;
0438         omap_cfg_reg(USB1_VP);
0439         omap_cfg_reg(USB1_VM);
0440         if (!cpu_is_omap15xx()) {
0441             u32 l;
0442 
0443             l = omap_readl(USB_TRANSCEIVER_CTRL);
0444             l |= CONF_USB1_UNI_R;
0445             omap_writel(l, USB_TRANSCEIVER_CTRL);
0446         }
0447         break;
0448     default:
0449 bad:
0450         printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
0451             1, nwires);
0452     }
0453 
0454     return syscon1 << 20;
0455 }
0456 
0457 static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
0458 {
0459     u32 syscon1 = 0;
0460 
0461     /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
0462     if (alt_pingroup || nwires == 0)
0463         return 0;
0464 
0465     if (!cpu_is_omap15xx() && nwires != 6) {
0466         u32 l;
0467 
0468         l = omap_readl(USB_TRANSCEIVER_CTRL);
0469         l &= ~CONF_USB2_UNI_R;
0470         omap_writel(l, USB_TRANSCEIVER_CTRL);
0471     }
0472 
0473     /* external transceiver */
0474     if (cpu_is_omap15xx()) {
0475         omap_cfg_reg(USB2_TXD);
0476         omap_cfg_reg(USB2_TXEN);
0477         omap_cfg_reg(USB2_SEO);
0478         if (nwires != 3)
0479             omap_cfg_reg(USB2_RCV);
0480         /* there is no USB2_SPEED */
0481     } else if (cpu_is_omap16xx()) {
0482         omap_cfg_reg(V6_USB2_TXD);
0483         omap_cfg_reg(W9_USB2_TXEN);
0484         omap_cfg_reg(W5_USB2_SE0);
0485         if (nwires != 3)
0486             omap_cfg_reg(Y5_USB2_RCV);
0487         // FIXME omap_cfg_reg(USB2_SPEED);
0488     } else {
0489         pr_debug("usb%d cpu unrecognized\n", 1);
0490         return 0;
0491     }
0492 
0493     // omap_cfg_reg(USB2_SUSP);
0494 
0495     switch (nwires) {
0496     case 2:
0497         goto bad;
0498     case 3:
0499         syscon1 = 2;
0500         break;
0501     case 4:
0502         syscon1 = 1;
0503         break;
0504     case 5:
0505         goto bad;
0506     case 6:
0507         syscon1 = 3;
0508         if (cpu_is_omap15xx()) {
0509             omap_cfg_reg(USB2_VP);
0510             omap_cfg_reg(USB2_VM);
0511         } else {
0512             u32 l;
0513 
0514             omap_cfg_reg(AA9_USB2_VP);
0515             omap_cfg_reg(R9_USB2_VM);
0516             l = omap_readl(USB_TRANSCEIVER_CTRL);
0517             l |= CONF_USB2_UNI_R;
0518             omap_writel(l, USB_TRANSCEIVER_CTRL);
0519         }
0520         break;
0521     default:
0522 bad:
0523         printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
0524             2, nwires);
0525     }
0526 
0527     return syscon1 << 24;
0528 }
0529 
0530 #ifdef  CONFIG_ARCH_OMAP15XX
0531 /* OMAP-1510 OHCI has its own MMU for DMA */
0532 #define OMAP1510_LB_MEMSIZE 32  /* Should be same as SDRAM size */
0533 #define OMAP1510_LB_CLOCK_DIV   0xfffec10c
0534 #define OMAP1510_LB_MMU_CTL 0xfffec208
0535 #define OMAP1510_LB_MMU_LCK 0xfffec224
0536 #define OMAP1510_LB_MMU_LD_TLB  0xfffec228
0537 #define OMAP1510_LB_MMU_CAM_H   0xfffec22c
0538 #define OMAP1510_LB_MMU_CAM_L   0xfffec230
0539 #define OMAP1510_LB_MMU_RAM_H   0xfffec234
0540 #define OMAP1510_LB_MMU_RAM_L   0xfffec238
0541 
0542 /*
0543  * Bus address is physical address, except for OMAP-1510 Local Bus.
0544  * OMAP-1510 bus address is translated into a Local Bus address if the
0545  * OMAP bus type is lbus.
0546  */
0547 #define OMAP1510_LB_OFFSET     UL(0x30000000)
0548 
0549 /*
0550  * OMAP-1510 specific Local Bus clock on/off
0551  */
0552 static int omap_1510_local_bus_power(int on)
0553 {
0554     if (on) {
0555         omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
0556         udelay(200);
0557     } else {
0558         omap_writel(0, OMAP1510_LB_MMU_CTL);
0559     }
0560 
0561     return 0;
0562 }
0563 
0564 /*
0565  * OMAP-1510 specific Local Bus initialization
0566  * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
0567  *       See also arch/mach-omap/memory.h for __virt_to_dma() and
0568  *       __dma_to_virt() which need to match with the physical
0569  *       Local Bus address below.
0570  */
0571 static int omap_1510_local_bus_init(void)
0572 {
0573     unsigned int tlb;
0574     unsigned long lbaddr, physaddr;
0575 
0576     omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
0577            OMAP1510_LB_CLOCK_DIV);
0578 
0579     /* Configure the Local Bus MMU table */
0580     for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
0581         lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
0582         physaddr = tlb * 0x00100000 + PHYS_OFFSET;
0583         omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
0584         omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
0585                OMAP1510_LB_MMU_CAM_L);
0586         omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
0587         omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
0588         omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
0589         omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
0590     }
0591 
0592     /* Enable the walking table */
0593     omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
0594     udelay(200);
0595 
0596     return 0;
0597 }
0598 
0599 static void omap_1510_local_bus_reset(void)
0600 {
0601     omap_1510_local_bus_power(1);
0602     omap_1510_local_bus_init();
0603 }
0604 
0605 /* ULPD_DPLL_CTRL */
0606 #define DPLL_IOB        (1 << 13)
0607 #define DPLL_PLL_ENABLE     (1 << 4)
0608 #define DPLL_LOCK       (1 << 0)
0609 
0610 /* ULPD_APLL_CTRL */
0611 #define APLL_NDPLL_SWITCH   (1 << 0)
0612 
0613 static void __init omap_1510_usb_init(struct omap_usb_config *config)
0614 {
0615     unsigned int val;
0616     u16 w;
0617 
0618     config->usb0_init(config->pins[0], is_usb0_device(config));
0619     config->usb1_init(config->pins[1]);
0620     config->usb2_init(config->pins[2], 0);
0621 
0622     val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
0623     val |= (config->hmc_mode << 1);
0624     omap_writel(val, MOD_CONF_CTRL_0);
0625 
0626     printk("USB: hmc %d", config->hmc_mode);
0627     if (config->pins[0])
0628         pr_cont(", usb0 %d wires%s", config->pins[0],
0629             is_usb0_device(config) ? " (dev)" : "");
0630     if (config->pins[1])
0631         pr_cont(", usb1 %d wires", config->pins[1]);
0632     if (config->pins[2])
0633         pr_cont(", usb2 %d wires", config->pins[2]);
0634     pr_cont("\n");
0635 
0636     /* use DPLL for 48 MHz function clock */
0637     pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
0638             omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
0639 
0640     w = omap_readw(ULPD_APLL_CTRL);
0641     w &= ~APLL_NDPLL_SWITCH;
0642     omap_writew(w, ULPD_APLL_CTRL);
0643 
0644     w = omap_readw(ULPD_DPLL_CTRL);
0645     w |= DPLL_IOB | DPLL_PLL_ENABLE;
0646     omap_writew(w, ULPD_DPLL_CTRL);
0647 
0648     w = omap_readw(ULPD_SOFT_REQ);
0649     w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
0650     omap_writew(w, ULPD_SOFT_REQ);
0651 
0652     while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
0653         cpu_relax();
0654 
0655 #if IS_ENABLED(CONFIG_USB_OMAP)
0656     if (config->register_dev) {
0657         int status;
0658 
0659         udc_device.dev.platform_data = config;
0660         status = platform_device_register(&udc_device);
0661         if (status)
0662             pr_debug("can't register UDC device, %d\n", status);
0663         /* udc driver gates 48MHz by D+ pullup */
0664     }
0665 #endif
0666 
0667     if (IS_ENABLED(CONFIG_USB_OHCI_HCD) && config->register_host) {
0668         int status;
0669 
0670         ohci_device.dev.platform_data = config;
0671         dma_direct_set_offset(&ohci_device.dev, PHYS_OFFSET,
0672                       OMAP1510_LB_OFFSET, (u64)-1);
0673         status = platform_device_register(&ohci_device);
0674         if (status)
0675             pr_debug("can't register OHCI device, %d\n", status);
0676         /* hcd explicitly gates 48MHz */
0677 
0678         config->lb_reset = omap_1510_local_bus_reset;
0679     }
0680 }
0681 
0682 #else
0683 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
0684 #endif
0685 
0686 void __init omap1_usb_init(struct omap_usb_config *_pdata)
0687 {
0688     struct omap_usb_config *pdata;
0689 
0690     pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
0691     if (!pdata)
0692         return;
0693 
0694     pdata->usb0_init = omap1_usb0_init;
0695     pdata->usb1_init = omap1_usb1_init;
0696     pdata->usb2_init = omap1_usb2_init;
0697     udc_device_init(pdata);
0698     ohci_device_init(pdata);
0699     otg_device_init(pdata);
0700 
0701     if (cpu_is_omap7xx() || cpu_is_omap16xx())
0702         omap_otg_init(pdata);
0703     else if (cpu_is_omap15xx())
0704         omap_1510_usb_init(pdata);
0705     else
0706         printk(KERN_ERR "USB: No init for your chip yet\n");
0707 }
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