arm/mach-omap1/mux.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Table of the Omap register configurations for the FUNC_MUX and
0004  * PULL_DWN combinations.
0005  *
0006  * Copyright (C) 2004 - 2008 Texas Instruments Inc.
0007  * Copyright (C) 2003 - 2008 Nokia Corporation
0008  *
0009  * Written by Tony Lindgren
0010  *
0011  * NOTE: Please use the following naming style for new pin entries.
0012  *   For example, W8_1610_MMC2_DAT0, where:
0013  *   - W8        = ball
0014  *   - 1610      = 1510 or 1610, none if common for both 1510 and 1610
0015  *   - MMC2_DAT0 = function
0016  */
0017
0018 #ifndef __ASM_ARCH_MUX_H
0019 #define __ASM_ARCH_MUX_H
0020
0021 #include <linux/soc/ti/omap1-mux.h>
0022
0023 #define PU_PD_SEL_NA        0   /* No pu_pd reg available */
0024 #define PULL_DWN_CTRL_NA    0   /* No pull-down control needed */
0025
0026 #ifdef  CONFIG_OMAP_MUX_DEBUG
0027 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \
0028                     .mux_reg = FUNC_MUX_CTRL_##reg, \
0029                     .mask_offset = mode_offset, \
0030                     .mask = mode,
0031
0032 #define PULL_REG(reg, bit, status)  .pull_name = "PULL_DWN_CTRL_"#reg, \
0033                     .pull_reg = PULL_DWN_CTRL_##reg, \
0034                     .pull_bit = bit, \
0035                     .pull_val = status,
0036
0037 #define PU_PD_REG(reg, status)      .pu_pd_name = "PU_PD_SEL_"#reg, \
0038                     .pu_pd_reg = PU_PD_SEL_##reg, \
0039                     .pu_pd_val = status,
0040
0041 #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
0042                     .mux_reg = OMAP7XX_IO_CONF_##reg, \
0043                     .mask_offset = mode_offset, \
0044                     .mask = mode,
0045
0046 #define PULL_REG_7XX(reg, bit, status)  .pull_name = "OMAP7XX_IO_CONF_"#reg, \
0047                     .pull_reg = OMAP7XX_IO_CONF_##reg, \
0048                     .pull_bit = bit, \
0049                     .pull_val = status,
0050
0051 #else
0052
0053 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
0054                     .mask_offset = mode_offset, \
0055                     .mask = mode,
0056
0057 #define PULL_REG(reg, bit, status)  .pull_reg = PULL_DWN_CTRL_##reg, \
0058                     .pull_bit = bit, \
0059                     .pull_val = status,
0060
0061 #define PU_PD_REG(reg, status)      .pu_pd_reg = PU_PD_SEL_##reg, \
0062                     .pu_pd_val = status,
0063
0064 #define MUX_REG_7XX(reg, mode_offset, mode) \
0065                     .mux_reg = OMAP7XX_IO_CONF_##reg, \
0066                     .mask_offset = mode_offset, \
0067                     .mask = mode,
0068
0069 #define PULL_REG_7XX(reg, bit, status)  .pull_reg = OMAP7XX_IO_CONF_##reg, \
0070                     .pull_bit = bit, \
0071                     .pull_val = status,
0072
0073 #endif /* CONFIG_OMAP_MUX_DEBUG */
0074
0075 #define MUX_CFG(desc, mux_reg, mode_offset, mode,   \
0076         pull_reg, pull_bit, pull_status,    \
0077         pu_pd_reg, pu_pd_status, debug_status)  \
0078 {                           \
0079     .name =  desc,                  \
0080     .debug = debug_status,              \
0081     MUX_REG(mux_reg, mode_offset, mode)     \
0082     PULL_REG(pull_reg, pull_bit, pull_status)   \
0083     PU_PD_REG(pu_pd_reg, pu_pd_status)      \
0084 },
0085
0086
0087 /*
0088  * OMAP730/850 has a slightly different config for the pin mux.
0089  * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and
0090  *   not the FUNC_MUX_CTRL_x regs from hardware.h
0091  * - for pull-up/down, only has one enable bit which is in the same register
0092  *   as mux config
0093  */
0094 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode,   \
0095            pull_bit, pull_status, debug_status)\
0096 {                           \
0097     .name =  desc,                  \
0098     .debug = debug_status,              \
0099     MUX_REG_7XX(mux_reg, mode_offset, mode)     \
0100     PULL_REG_7XX(mux_reg, pull_bit, pull_status)    \
0101     PU_PD_REG(NA, 0)        \
0102 },
0103
0104 struct pin_config {
0105     char            *name;
0106     const unsigned int  mux_reg;
0107     unsigned char       debug;
0108
0109     const unsigned char mask_offset;
0110     const unsigned char mask;
0111
0112     const char *pull_name;
0113     const unsigned int pull_reg;
0114     const unsigned char pull_val;
0115     const unsigned char pull_bit;
0116
0117     const char *pu_pd_name;
0118     const unsigned int pu_pd_reg;
0119     const unsigned char pu_pd_val;
0120
0121 #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
0122     const char *mux_reg_name;
0123 #endif
0124
0125 };
0126
0127 struct omap_mux_cfg {
0128     struct pin_config   *pins;
0129     unsigned long       size;
0130     int         (*cfg_reg)(const struct pin_config *cfg);
0131 };
0132
0133 #ifdef  CONFIG_OMAP_MUX
0134 /* setup pin muxing in Linux */
0135 extern int omap1_mux_init(void);
0136 extern int omap_mux_register(struct omap_mux_cfg *);
0137 #else
0138 /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
0139 static inline int omap1_mux_init(void) { return 0; }
0140 #endif
0141
0142 extern int omap2_mux_init(void);
0143
0144 #endif