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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * linux/arch/arm/mach-omap1/io.c
0004  *
0005  * OMAP1 I/O mapping code
0006  */
0007 
0008 #include <linux/module.h>
0009 #include <linux/kernel.h>
0010 #include <linux/init.h>
0011 #include <linux/io.h>
0012 #include <linux/omap-dma.h>
0013 
0014 #include <asm/tlb.h>
0015 #include <asm/mach/map.h>
0016 
0017 #include "tc.h"
0018 #include "iomap.h"
0019 #include "common.h"
0020 
0021 /*
0022  * The machine specific code may provide the extra mapping besides the
0023  * default mapping provided here.
0024  */
0025 static struct map_desc omap_io_desc[] __initdata = {
0026     {
0027         .virtual    = OMAP1_IO_VIRT,
0028         .pfn        = __phys_to_pfn(OMAP1_IO_PHYS),
0029         .length     = OMAP1_IO_SIZE,
0030         .type       = MT_DEVICE
0031     }
0032 };
0033 
0034 #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
0035 static struct map_desc omap7xx_io_desc[] __initdata = {
0036     {
0037         .virtual    = OMAP7XX_DSP_BASE,
0038         .pfn        = __phys_to_pfn(OMAP7XX_DSP_START),
0039         .length     = OMAP7XX_DSP_SIZE,
0040         .type       = MT_DEVICE
0041     }, {
0042         .virtual    = OMAP7XX_DSPREG_BASE,
0043         .pfn        = __phys_to_pfn(OMAP7XX_DSPREG_START),
0044         .length     = OMAP7XX_DSPREG_SIZE,
0045         .type       = MT_DEVICE
0046     }
0047 };
0048 #endif
0049 
0050 #ifdef CONFIG_ARCH_OMAP15XX
0051 static struct map_desc omap1510_io_desc[] __initdata = {
0052     {
0053         .virtual    = OMAP1510_DSP_BASE,
0054         .pfn        = __phys_to_pfn(OMAP1510_DSP_START),
0055         .length     = OMAP1510_DSP_SIZE,
0056         .type       = MT_DEVICE
0057     }, {
0058         .virtual    = OMAP1510_DSPREG_BASE,
0059         .pfn        = __phys_to_pfn(OMAP1510_DSPREG_START),
0060         .length     = OMAP1510_DSPREG_SIZE,
0061         .type       = MT_DEVICE
0062     }
0063 };
0064 #endif
0065 
0066 #if defined(CONFIG_ARCH_OMAP16XX)
0067 static struct map_desc omap16xx_io_desc[] __initdata = {
0068     {
0069         .virtual    = OMAP16XX_DSP_BASE,
0070         .pfn        = __phys_to_pfn(OMAP16XX_DSP_START),
0071         .length     = OMAP16XX_DSP_SIZE,
0072         .type       = MT_DEVICE
0073     }, {
0074         .virtual    = OMAP16XX_DSPREG_BASE,
0075         .pfn        = __phys_to_pfn(OMAP16XX_DSPREG_START),
0076         .length     = OMAP16XX_DSPREG_SIZE,
0077         .type       = MT_DEVICE
0078     }
0079 };
0080 #endif
0081 
0082 /*
0083  * Maps common IO regions for omap1
0084  */
0085 static void __init omap1_map_common_io(void)
0086 {
0087     iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
0088 }
0089 
0090 #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
0091 void __init omap7xx_map_io(void)
0092 {
0093     omap1_map_common_io();
0094     iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
0095 }
0096 #endif
0097 
0098 #ifdef CONFIG_ARCH_OMAP15XX
0099 void __init omap15xx_map_io(void)
0100 {
0101     omap1_map_common_io();
0102     iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
0103 }
0104 #endif
0105 
0106 #if defined(CONFIG_ARCH_OMAP16XX)
0107 void __init omap16xx_map_io(void)
0108 {
0109     omap1_map_common_io();
0110     iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
0111 }
0112 #endif
0113 
0114 /*
0115  * Common low-level hardware init for omap1.
0116  */
0117 void __init omap1_init_early(void)
0118 {
0119     omap_check_revision();
0120 
0121     /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
0122      * on a Posted Write in the TIPB Bridge".
0123      */
0124     omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
0125     omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
0126 }
0127 
0128 void __init omap1_init_late(void)
0129 {
0130     omap_serial_wakeup_init();
0131 }
0132 
0133 /*
0134  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
0135  */
0136 
0137 u8 omap_readb(u32 pa)
0138 {
0139     return __raw_readb(OMAP1_IO_ADDRESS(pa));
0140 }
0141 EXPORT_SYMBOL(omap_readb);
0142 
0143 u16 omap_readw(u32 pa)
0144 {
0145     return __raw_readw(OMAP1_IO_ADDRESS(pa));
0146 }
0147 EXPORT_SYMBOL(omap_readw);
0148 
0149 u32 omap_readl(u32 pa)
0150 {
0151     return __raw_readl(OMAP1_IO_ADDRESS(pa));
0152 }
0153 EXPORT_SYMBOL(omap_readl);
0154 
0155 void omap_writeb(u8 v, u32 pa)
0156 {
0157     __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
0158 }
0159 EXPORT_SYMBOL(omap_writeb);
0160 
0161 void omap_writew(u16 v, u32 pa)
0162 {
0163     __raw_writew(v, OMAP1_IO_ADDRESS(pa));
0164 }
0165 EXPORT_SYMBOL(omap_writew);
0166 
0167 void omap_writel(u32 v, u32 pa)
0168 {
0169     __raw_writel(v, OMAP1_IO_ADDRESS(pa));
0170 }
0171 EXPORT_SYMBOL(omap_writel);