arm/mach-omap1/gpio7xx.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * OMAP7xx specific gpio init
0004  *
0005  * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
0006  *
0007  * Author:
0008  *  Charulatha V <charu@ti.com>
0009  */
0010
0011 #include <linux/gpio.h>
0012 #include <linux/platform_data/gpio-omap.h>
0013
0014 #include "irqs.h"
0015 #include "soc.h"
0016
0017 #define OMAP7XX_GPIO1_BASE      0xfffbc000
0018 #define OMAP7XX_GPIO2_BASE      0xfffbc800
0019 #define OMAP7XX_GPIO3_BASE      0xfffbd000
0020 #define OMAP7XX_GPIO4_BASE      0xfffbd800
0021 #define OMAP7XX_GPIO5_BASE      0xfffbe000
0022 #define OMAP7XX_GPIO6_BASE      0xfffbe800
0023 #define OMAP1_MPUIO_VBASE       OMAP1_MPUIO_BASE
0024
0025 /* mpu gpio */
0026 static struct resource omap7xx_mpu_gpio_resources[] = {
0027     {
0028         .start  = OMAP1_MPUIO_VBASE,
0029         .end    = OMAP1_MPUIO_VBASE + SZ_2K - 1,
0030         .flags  = IORESOURCE_MEM,
0031     },
0032     {
0033         .start  = INT_7XX_MPUIO,
0034         .flags  = IORESOURCE_IRQ,
0035     },
0036 };
0037
0038 static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
0039     .revision   = USHRT_MAX,
0040     .direction  = OMAP_MPUIO_IO_CNTL / 2,
0041     .datain     = OMAP_MPUIO_INPUT_LATCH / 2,
0042     .dataout    = OMAP_MPUIO_OUTPUT / 2,
0043     .irqstatus  = OMAP_MPUIO_GPIO_INT / 2,
0044     .irqenable  = OMAP_MPUIO_GPIO_MASKIT / 2,
0045     .irqenable_inv  = true,
0046     .irqctrl    = OMAP_MPUIO_GPIO_INT_EDGE >> 1,
0047 };
0048
0049 static struct omap_gpio_platform_data omap7xx_mpu_gpio_config = {
0050     .is_mpuio       = true,
0051     .bank_width     = 16,
0052     .bank_stride        = 2,
0053     .regs                   = &omap7xx_mpuio_regs,
0054 };
0055
0056 static struct platform_device omap7xx_mpu_gpio = {
0057     .name           = "omap_gpio",
0058     .id             = 0,
0059     .dev            = {
0060         .platform_data = &omap7xx_mpu_gpio_config,
0061     },
0062     .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources),
0063     .resource = omap7xx_mpu_gpio_resources,
0064 };
0065
0066 /* gpio1 */
0067 static struct resource omap7xx_gpio1_resources[] = {
0068     {
0069         .start  = OMAP7XX_GPIO1_BASE,
0070         .end    = OMAP7XX_GPIO1_BASE + SZ_2K - 1,
0071         .flags  = IORESOURCE_MEM,
0072     },
0073     {
0074         .start  = INT_7XX_GPIO_BANK1,
0075         .flags  = IORESOURCE_IRQ,
0076     },
0077 };
0078
0079 static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
0080     .revision   = USHRT_MAX,
0081     .direction  = OMAP7XX_GPIO_DIR_CONTROL,
0082     .datain     = OMAP7XX_GPIO_DATA_INPUT,
0083     .dataout    = OMAP7XX_GPIO_DATA_OUTPUT,
0084     .irqstatus  = OMAP7XX_GPIO_INT_STATUS,
0085     .irqenable  = OMAP7XX_GPIO_INT_MASK,
0086     .irqenable_inv  = true,
0087     .irqctrl    = OMAP7XX_GPIO_INT_CONTROL,
0088 };
0089
0090 static struct omap_gpio_platform_data omap7xx_gpio1_config = {
0091     .bank_width     = 32,
0092     .regs           = &omap7xx_gpio_regs,
0093 };
0094
0095 static struct platform_device omap7xx_gpio1 = {
0096     .name           = "omap_gpio",
0097     .id             = 1,
0098     .dev            = {
0099         .platform_data = &omap7xx_gpio1_config,
0100     },
0101     .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources),
0102     .resource = omap7xx_gpio1_resources,
0103 };
0104
0105 /* gpio2 */
0106 static struct resource omap7xx_gpio2_resources[] = {
0107     {
0108         .start  = OMAP7XX_GPIO2_BASE,
0109         .end    = OMAP7XX_GPIO2_BASE + SZ_2K - 1,
0110         .flags  = IORESOURCE_MEM,
0111     },
0112     {
0113         .start  = INT_7XX_GPIO_BANK2,
0114         .flags  = IORESOURCE_IRQ,
0115     },
0116 };
0117
0118 static struct omap_gpio_platform_data omap7xx_gpio2_config = {
0119     .bank_width     = 32,
0120     .regs           = &omap7xx_gpio_regs,
0121 };
0122
0123 static struct platform_device omap7xx_gpio2 = {
0124     .name           = "omap_gpio",
0125     .id             = 2,
0126     .dev            = {
0127         .platform_data = &omap7xx_gpio2_config,
0128     },
0129     .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources),
0130     .resource = omap7xx_gpio2_resources,
0131 };
0132
0133 /* gpio3 */
0134 static struct resource omap7xx_gpio3_resources[] = {
0135     {
0136         .start  = OMAP7XX_GPIO3_BASE,
0137         .end    = OMAP7XX_GPIO3_BASE + SZ_2K - 1,
0138         .flags  = IORESOURCE_MEM,
0139     },
0140     {
0141         .start  = INT_7XX_GPIO_BANK3,
0142         .flags  = IORESOURCE_IRQ,
0143     },
0144 };
0145
0146 static struct omap_gpio_platform_data omap7xx_gpio3_config = {
0147     .bank_width     = 32,
0148     .regs           = &omap7xx_gpio_regs,
0149 };
0150
0151 static struct platform_device omap7xx_gpio3 = {
0152     .name           = "omap_gpio",
0153     .id             = 3,
0154     .dev            = {
0155         .platform_data = &omap7xx_gpio3_config,
0156     },
0157     .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources),
0158     .resource = omap7xx_gpio3_resources,
0159 };
0160
0161 /* gpio4 */
0162 static struct resource omap7xx_gpio4_resources[] = {
0163     {
0164         .start  = OMAP7XX_GPIO4_BASE,
0165         .end    = OMAP7XX_GPIO4_BASE + SZ_2K - 1,
0166         .flags  = IORESOURCE_MEM,
0167     },
0168     {
0169         .start  = INT_7XX_GPIO_BANK4,
0170         .flags  = IORESOURCE_IRQ,
0171     },
0172 };
0173
0174 static struct omap_gpio_platform_data omap7xx_gpio4_config = {
0175     .bank_width     = 32,
0176     .regs           = &omap7xx_gpio_regs,
0177 };
0178
0179 static struct platform_device omap7xx_gpio4 = {
0180     .name           = "omap_gpio",
0181     .id             = 4,
0182     .dev            = {
0183         .platform_data = &omap7xx_gpio4_config,
0184     },
0185     .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources),
0186     .resource = omap7xx_gpio4_resources,
0187 };
0188
0189 /* gpio5 */
0190 static struct resource omap7xx_gpio5_resources[] = {
0191     {
0192         .start  = OMAP7XX_GPIO5_BASE,
0193         .end    = OMAP7XX_GPIO5_BASE + SZ_2K - 1,
0194         .flags  = IORESOURCE_MEM,
0195     },
0196     {
0197         .start  = INT_7XX_GPIO_BANK5,
0198         .flags  = IORESOURCE_IRQ,
0199     },
0200 };
0201
0202 static struct omap_gpio_platform_data omap7xx_gpio5_config = {
0203     .bank_width     = 32,
0204     .regs           = &omap7xx_gpio_regs,
0205 };
0206
0207 static struct platform_device omap7xx_gpio5 = {
0208     .name           = "omap_gpio",
0209     .id             = 5,
0210     .dev            = {
0211         .platform_data = &omap7xx_gpio5_config,
0212     },
0213     .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources),
0214     .resource = omap7xx_gpio5_resources,
0215 };
0216
0217 /* gpio6 */
0218 static struct resource omap7xx_gpio6_resources[] = {
0219     {
0220         .start  = OMAP7XX_GPIO6_BASE,
0221         .end    = OMAP7XX_GPIO6_BASE + SZ_2K - 1,
0222         .flags  = IORESOURCE_MEM,
0223     },
0224     {
0225         .start  = INT_7XX_GPIO_BANK6,
0226         .flags  = IORESOURCE_IRQ,
0227     },
0228 };
0229
0230 static struct omap_gpio_platform_data omap7xx_gpio6_config = {
0231     .bank_width     = 32,
0232     .regs           = &omap7xx_gpio_regs,
0233 };
0234
0235 static struct platform_device omap7xx_gpio6 = {
0236     .name           = "omap_gpio",
0237     .id             = 6,
0238     .dev            = {
0239         .platform_data = &omap7xx_gpio6_config,
0240     },
0241     .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources),
0242     .resource = omap7xx_gpio6_resources,
0243 };
0244
0245 static struct platform_device *omap7xx_gpio_dev[] __initdata = {
0246     &omap7xx_mpu_gpio,
0247     &omap7xx_gpio1,
0248     &omap7xx_gpio2,
0249     &omap7xx_gpio3,
0250     &omap7xx_gpio4,
0251     &omap7xx_gpio5,
0252     &omap7xx_gpio6,
0253 };
0254
0255 /*
0256  * omap7xx_gpio_init needs to be done before
0257  * machine_init functions access gpio APIs.
0258  * Hence omap7xx_gpio_init is a postcore_initcall.
0259  */
0260 static int __init omap7xx_gpio_init(void)
0261 {
0262     int i;
0263
0264     if (!cpu_is_omap7xx())
0265         return -EINVAL;
0266
0267     for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
0268         platform_device_register(omap7xx_gpio_dev[i]);
0269
0270     return 0;
0271 }
0272 postcore_initcall(omap7xx_gpio_init);