arm/mach-omap1/gpio15xx.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * OMAP15xx specific gpio init
0004  *
0005  * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
0006  *
0007  * Author:
0008  *  Charulatha V <charu@ti.com>
0009  */
0010
0011 #include <linux/gpio.h>
0012 #include <linux/platform_data/gpio-omap.h>
0013 #include <linux/soc/ti/omap1-soc.h>
0014
0015 #include "irqs.h"
0016
0017 #define OMAP1_MPUIO_VBASE       OMAP1_MPUIO_BASE
0018 #define OMAP1510_GPIO_BASE      0xFFFCE000
0019
0020 /* gpio1 */
0021 static struct resource omap15xx_mpu_gpio_resources[] = {
0022     {
0023         .start  = OMAP1_MPUIO_VBASE,
0024         .end    = OMAP1_MPUIO_VBASE + SZ_2K - 1,
0025         .flags  = IORESOURCE_MEM,
0026     },
0027     {
0028         .start  = INT_MPUIO,
0029         .flags  = IORESOURCE_IRQ,
0030     },
0031 };
0032
0033 static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
0034     .revision       = USHRT_MAX,
0035     .direction  = OMAP_MPUIO_IO_CNTL,
0036     .datain     = OMAP_MPUIO_INPUT_LATCH,
0037     .dataout    = OMAP_MPUIO_OUTPUT,
0038     .irqstatus  = OMAP_MPUIO_GPIO_INT,
0039     .irqenable  = OMAP_MPUIO_GPIO_MASKIT,
0040     .irqenable_inv  = true,
0041     .irqctrl    = OMAP_MPUIO_GPIO_INT_EDGE,
0042 };
0043
0044 static struct omap_gpio_platform_data omap15xx_mpu_gpio_config = {
0045     .is_mpuio       = true,
0046     .bank_width     = 16,
0047     .bank_stride        = 1,
0048     .regs           = &omap15xx_mpuio_regs,
0049 };
0050
0051 static struct platform_device omap15xx_mpu_gpio = {
0052     .name           = "omap_gpio",
0053     .id             = 0,
0054     .dev            = {
0055         .platform_data = &omap15xx_mpu_gpio_config,
0056     },
0057     .num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources),
0058     .resource = omap15xx_mpu_gpio_resources,
0059 };
0060
0061 /* gpio2 */
0062 static struct resource omap15xx_gpio_resources[] = {
0063     {
0064         .start  = OMAP1510_GPIO_BASE,
0065         .end    = OMAP1510_GPIO_BASE + SZ_2K - 1,
0066         .flags  = IORESOURCE_MEM,
0067     },
0068     {
0069         .start  = INT_GPIO_BANK1,
0070         .flags  = IORESOURCE_IRQ,
0071     },
0072 };
0073
0074 static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
0075     .revision   = USHRT_MAX,
0076     .direction  = OMAP1510_GPIO_DIR_CONTROL,
0077     .datain     = OMAP1510_GPIO_DATA_INPUT,
0078     .dataout    = OMAP1510_GPIO_DATA_OUTPUT,
0079     .irqstatus  = OMAP1510_GPIO_INT_STATUS,
0080     .irqenable  = OMAP1510_GPIO_INT_MASK,
0081     .irqenable_inv  = true,
0082     .irqctrl    = OMAP1510_GPIO_INT_CONTROL,
0083     .pinctrl    = OMAP1510_GPIO_PIN_CONTROL,
0084 };
0085
0086 static struct omap_gpio_platform_data omap15xx_gpio_config = {
0087     .bank_width     = 16,
0088     .regs                   = &omap15xx_gpio_regs,
0089 };
0090
0091 static struct platform_device omap15xx_gpio = {
0092     .name           = "omap_gpio",
0093     .id             = 1,
0094     .dev            = {
0095         .platform_data = &omap15xx_gpio_config,
0096     },
0097     .num_resources = ARRAY_SIZE(omap15xx_gpio_resources),
0098     .resource = omap15xx_gpio_resources,
0099 };
0100
0101 /*
0102  * omap15xx_gpio_init needs to be done before
0103  * machine_init functions access gpio APIs.
0104  * Hence omap15xx_gpio_init is a postcore_initcall.
0105  */
0106 static int __init omap15xx_gpio_init(void)
0107 {
0108     if (!cpu_is_omap15xx())
0109         return -EINVAL;
0110
0111     platform_device_register(&omap15xx_mpu_gpio);
0112     platform_device_register(&omap15xx_gpio);
0113
0114     return 0;
0115 }
0116 postcore_initcall(omap15xx_gpio_init);