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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Interrupt handler for OMAP-1510 FPGA
0004  *
0005  * Copyright (C) 2001 RidgeRun, Inc.
0006  * Author: Greg Lonnon <glonnon@ridgerun.com>
0007  *
0008  * Copyright (C) 2002 MontaVista Software, Inc.
0009  *
0010  * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
0011  * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
0012  */
0013 
0014 #ifndef __ASM_ARCH_OMAP_FPGA_H
0015 #define __ASM_ARCH_OMAP_FPGA_H
0016 
0017 /*
0018  * ---------------------------------------------------------------------------
0019  *  H2/P2 Debug board FPGA
0020  * ---------------------------------------------------------------------------
0021  */
0022 /* maps in the FPGA registers and the ETHR registers */
0023 #define H2P2_DBG_FPGA_BASE      0xE8000000      /* VA */
0024 #define H2P2_DBG_FPGA_SIZE      SZ_4K           /* SIZE */
0025 #define H2P2_DBG_FPGA_START     0x04000000      /* PA */
0026 
0027 #define H2P2_DBG_FPGA_ETHR_START    (H2P2_DBG_FPGA_START + 0x300)
0028 #define H2P2_DBG_FPGA_FPGA_REV      IOMEM(H2P2_DBG_FPGA_BASE + 0x10)    /* FPGA Revision */
0029 #define H2P2_DBG_FPGA_BOARD_REV     IOMEM(H2P2_DBG_FPGA_BASE + 0x12)    /* Board Revision */
0030 #define H2P2_DBG_FPGA_GPIO      IOMEM(H2P2_DBG_FPGA_BASE + 0x14)    /* GPIO outputs */
0031 #define H2P2_DBG_FPGA_LEDS      IOMEM(H2P2_DBG_FPGA_BASE + 0x16)    /* LEDs outputs */
0032 #define H2P2_DBG_FPGA_MISC_INPUTS   IOMEM(H2P2_DBG_FPGA_BASE + 0x18)    /* Misc inputs */
0033 #define H2P2_DBG_FPGA_LAN_STATUS    IOMEM(H2P2_DBG_FPGA_BASE + 0x1A)    /* LAN Status line */
0034 #define H2P2_DBG_FPGA_LAN_RESET     IOMEM(H2P2_DBG_FPGA_BASE + 0x1C)    /* LAN Reset line */
0035 
0036 /* LEDs definition on debug board (16 LEDs, all physically green) */
0037 #define H2P2_DBG_FPGA_LED_GREEN     (1 << 15)
0038 #define H2P2_DBG_FPGA_LED_AMBER     (1 << 14)
0039 #define H2P2_DBG_FPGA_LED_RED       (1 << 13)
0040 #define H2P2_DBG_FPGA_LED_BLUE      (1 << 12)
0041 /*  cpu0 load-meter LEDs */
0042 #define H2P2_DBG_FPGA_LOAD_METER    (1 << 0)    // A bit of fun on our board ...
0043 #define H2P2_DBG_FPGA_LOAD_METER_SIZE   11
0044 #define H2P2_DBG_FPGA_LOAD_METER_MASK   ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
0045 
0046 #define H2P2_DBG_FPGA_P2_LED_TIMER      (1 << 0)
0047 #define H2P2_DBG_FPGA_P2_LED_IDLE       (1 << 1)
0048 
0049 #endif