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0008 #include <linux/dma-mapping.h>
0009 #include <linux/gpio.h>
0010 #include <linux/module.h>
0011 #include <linux/kernel.h>
0012 #include <linux/init.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/spi/spi.h>
0015
0016 #include <linux/platform_data/omap-wd-timer.h>
0017 #include <linux/soc/ti/omap1-io.h>
0018
0019 #include <asm/mach/map.h>
0020
0021 #include "tc.h"
0022 #include "mux.h"
0023
0024 #include "omap7xx.h"
0025 #include "hardware.h"
0026 #include "common.h"
0027 #include "clock.h"
0028 #include "mmc.h"
0029 #include "sram.h"
0030
0031 #if IS_ENABLED(CONFIG_RTC_DRV_OMAP)
0032
0033 #define OMAP_RTC_BASE 0xfffb4800
0034
0035 static struct resource rtc_resources[] = {
0036 {
0037 .start = OMAP_RTC_BASE,
0038 .end = OMAP_RTC_BASE + 0x5f,
0039 .flags = IORESOURCE_MEM,
0040 },
0041 {
0042 .start = INT_RTC_TIMER,
0043 .flags = IORESOURCE_IRQ,
0044 },
0045 {
0046 .start = INT_RTC_ALARM,
0047 .flags = IORESOURCE_IRQ,
0048 },
0049 };
0050
0051 static struct platform_device omap_rtc_device = {
0052 .name = "omap_rtc",
0053 .id = -1,
0054 .num_resources = ARRAY_SIZE(rtc_resources),
0055 .resource = rtc_resources,
0056 };
0057
0058 static void omap_init_rtc(void)
0059 {
0060 (void) platform_device_register(&omap_rtc_device);
0061 }
0062 #else
0063 static inline void omap_init_rtc(void) {}
0064 #endif
0065
0066 static inline void omap_init_mbox(void) { }
0067
0068
0069
0070 #if IS_ENABLED(CONFIG_MMC_OMAP)
0071
0072 static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
0073 int controller_nr)
0074 {
0075 if (controller_nr == 0) {
0076 if (cpu_is_omap7xx()) {
0077 omap_cfg_reg(MMC_7XX_CMD);
0078 omap_cfg_reg(MMC_7XX_CLK);
0079 omap_cfg_reg(MMC_7XX_DAT0);
0080 } else {
0081 omap_cfg_reg(MMC_CMD);
0082 omap_cfg_reg(MMC_CLK);
0083 omap_cfg_reg(MMC_DAT0);
0084 }
0085
0086 if (cpu_is_omap1710()) {
0087 omap_cfg_reg(M15_1710_MMC_CLKI);
0088 omap_cfg_reg(P19_1710_MMC_CMDDIR);
0089 omap_cfg_reg(P20_1710_MMC_DATDIR0);
0090 }
0091 if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
0092 omap_cfg_reg(MMC_DAT1);
0093
0094 if (!mmc_controller->slots[0].nomux)
0095 omap_cfg_reg(MMC_DAT2);
0096 omap_cfg_reg(MMC_DAT3);
0097 }
0098 }
0099
0100
0101 if (cpu_is_omap16xx() && controller_nr == 1) {
0102 if (!mmc_controller->slots[1].nomux) {
0103 omap_cfg_reg(Y8_1610_MMC2_CMD);
0104 omap_cfg_reg(Y10_1610_MMC2_CLK);
0105 omap_cfg_reg(R18_1610_MMC2_CLKIN);
0106 omap_cfg_reg(W8_1610_MMC2_DAT0);
0107 if (mmc_controller->slots[1].wires == 4) {
0108 omap_cfg_reg(V8_1610_MMC2_DAT1);
0109 omap_cfg_reg(W15_1610_MMC2_DAT2);
0110 omap_cfg_reg(R10_1610_MMC2_DAT3);
0111 }
0112
0113
0114 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
0115 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
0116 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
0117 }
0118
0119
0120 if (cpu_is_omap1710())
0121 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
0122 MOD_CONF_CTRL_1);
0123 }
0124 }
0125
0126 #define OMAP_MMC_NR_RES 4
0127
0128
0129
0130
0131 static int __init omap_mmc_add(const char *name, int id, unsigned long base,
0132 unsigned long size, unsigned int irq,
0133 unsigned rx_req, unsigned tx_req,
0134 struct omap_mmc_platform_data *data)
0135 {
0136 struct platform_device *pdev;
0137 struct resource res[OMAP_MMC_NR_RES];
0138 int ret;
0139
0140 pdev = platform_device_alloc(name, id);
0141 if (!pdev)
0142 return -ENOMEM;
0143
0144 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
0145 res[0].start = base;
0146 res[0].end = base + size - 1;
0147 res[0].flags = IORESOURCE_MEM;
0148 res[1].start = res[1].end = irq;
0149 res[1].flags = IORESOURCE_IRQ;
0150 res[2].start = rx_req;
0151 res[2].name = "rx";
0152 res[2].flags = IORESOURCE_DMA;
0153 res[3].start = tx_req;
0154 res[3].name = "tx";
0155 res[3].flags = IORESOURCE_DMA;
0156
0157 if (cpu_is_omap7xx())
0158 data->slots[0].features = MMC_OMAP7XX;
0159 if (cpu_is_omap15xx())
0160 data->slots[0].features = MMC_OMAP15XX;
0161 if (cpu_is_omap16xx())
0162 data->slots[0].features = MMC_OMAP16XX;
0163
0164 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
0165 if (ret == 0)
0166 ret = platform_device_add_data(pdev, data, sizeof(*data));
0167 if (ret)
0168 goto fail;
0169
0170 ret = platform_device_add(pdev);
0171 if (ret)
0172 goto fail;
0173
0174
0175 data->dev = &pdev->dev;
0176 return 0;
0177
0178 fail:
0179 platform_device_put(pdev);
0180 return ret;
0181 }
0182
0183 void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
0184 int nr_controllers)
0185 {
0186 int i;
0187
0188 for (i = 0; i < nr_controllers; i++) {
0189 unsigned long base, size;
0190 unsigned rx_req, tx_req;
0191 unsigned int irq = 0;
0192
0193 if (!mmc_data[i])
0194 continue;
0195
0196 omap1_mmc_mux(mmc_data[i], i);
0197
0198 switch (i) {
0199 case 0:
0200 base = OMAP1_MMC1_BASE;
0201 irq = INT_MMC;
0202 rx_req = 22;
0203 tx_req = 21;
0204 break;
0205 case 1:
0206 if (!cpu_is_omap16xx())
0207 return;
0208 base = OMAP1_MMC2_BASE;
0209 irq = INT_1610_MMC2;
0210 rx_req = 55;
0211 tx_req = 54;
0212 break;
0213 default:
0214 continue;
0215 }
0216 size = OMAP1_MMC_SIZE;
0217
0218 omap_mmc_add("mmci-omap", i, base, size, irq,
0219 rx_req, tx_req, mmc_data[i]);
0220 }
0221 }
0222
0223 #endif
0224
0225
0226
0227
0228 #if IS_ENABLED(CONFIG_SPI_OMAP_100K)
0229
0230 struct platform_device omap_spi1 = {
0231 .name = "omap1_spi100k",
0232 .id = 1,
0233 };
0234
0235 struct platform_device omap_spi2 = {
0236 .name = "omap1_spi100k",
0237 .id = 2,
0238 };
0239
0240 static void omap_init_spi100k(void)
0241 {
0242 if (!cpu_is_omap7xx())
0243 return;
0244
0245 omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
0246 if (omap_spi1.dev.platform_data)
0247 platform_device_register(&omap_spi1);
0248
0249 omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
0250 if (omap_spi2.dev.platform_data)
0251 platform_device_register(&omap_spi2);
0252 }
0253
0254 #else
0255 static inline void omap_init_spi100k(void)
0256 {
0257 }
0258 #endif
0259
0260
0261
0262 static inline void omap_init_sti(void) {}
0263
0264
0265
0266
0267
0268
0269
0270
0271 #if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)
0272
0273 #define OMAP_UWIRE_BASE 0xfffb3000
0274
0275 static struct resource uwire_resources[] = {
0276 {
0277 .start = OMAP_UWIRE_BASE,
0278 .end = OMAP_UWIRE_BASE + 0x20,
0279 .flags = IORESOURCE_MEM,
0280 },
0281 };
0282
0283 static struct platform_device omap_uwire_device = {
0284 .name = "omap_uwire",
0285 .id = -1,
0286 .num_resources = ARRAY_SIZE(uwire_resources),
0287 .resource = uwire_resources,
0288 };
0289
0290 static void omap_init_uwire(void)
0291 {
0292
0293
0294
0295
0296
0297
0298
0299
0300 (void) platform_device_register(&omap_uwire_device);
0301 }
0302 #else
0303 static inline void omap_init_uwire(void) {}
0304 #endif
0305
0306
0307 #define OMAP1_RNG_BASE 0xfffe5000
0308
0309 static struct resource omap1_rng_resources[] = {
0310 {
0311 .start = OMAP1_RNG_BASE,
0312 .end = OMAP1_RNG_BASE + 0x4f,
0313 .flags = IORESOURCE_MEM,
0314 },
0315 };
0316
0317 static struct platform_device omap1_rng_device = {
0318 .name = "omap_rng",
0319 .id = -1,
0320 .num_resources = ARRAY_SIZE(omap1_rng_resources),
0321 .resource = omap1_rng_resources,
0322 };
0323
0324 static void omap1_init_rng(void)
0325 {
0326 if (!cpu_is_omap16xx())
0327 return;
0328
0329 (void) platform_device_register(&omap1_rng_device);
0330 }
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0354 static int __init omap1_init_devices(void)
0355 {
0356 if (!cpu_class_is_omap1())
0357 return -ENODEV;
0358
0359 omap1_sram_init();
0360 omap1_clk_late_init();
0361
0362
0363
0364
0365
0366 omap_init_mbox();
0367 omap_init_rtc();
0368 omap_init_spi100k();
0369 omap_init_sti();
0370 omap_init_uwire();
0371 omap1_init_rng();
0372
0373 return 0;
0374 }
0375 arch_initcall(omap1_init_devices);
0376
0377 #if IS_ENABLED(CONFIG_OMAP_WATCHDOG)
0378
0379 static struct resource wdt_resources[] = {
0380 {
0381 .start = 0xfffeb000,
0382 .end = 0xfffeb07F,
0383 .flags = IORESOURCE_MEM,
0384 },
0385 };
0386
0387 static struct platform_device omap_wdt_device = {
0388 .name = "omap_wdt",
0389 .id = -1,
0390 .num_resources = ARRAY_SIZE(wdt_resources),
0391 .resource = wdt_resources,
0392 };
0393
0394 static int __init omap_init_wdt(void)
0395 {
0396 struct omap_wd_timer_platform_data pdata;
0397 int ret;
0398
0399 if (!cpu_is_omap16xx())
0400 return -ENODEV;
0401
0402 pdata.read_reset_sources = omap1_get_reset_sources;
0403
0404 ret = platform_device_register(&omap_wdt_device);
0405 if (!ret) {
0406 ret = platform_device_add_data(&omap_wdt_device, &pdata,
0407 sizeof(pdata));
0408 if (ret)
0409 platform_device_del(&omap_wdt_device);
0410 }
0411
0412 return ret;
0413 }
0414 subsys_initcall(omap_init_wdt);
0415 #endif