arm/mach-omap1/board-h3.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * linux/arch/arm/mach-omap1/board-h3.c
0004  *
0005  * This file contains OMAP1710 H3 specific code.
0006  *
0007  * Copyright (C) 2004 Texas Instruments, Inc.
0008  * Copyright (C) 2002 MontaVista Software, Inc.
0009  * Copyright (C) 2001 RidgeRun, Inc.
0010  * Author: RidgeRun, Inc.
0011  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
0012  */
0013 #include <linux/gpio.h>
0014 #include <linux/types.h>
0015 #include <linux/init.h>
0016 #include <linux/major.h>
0017 #include <linux/kernel.h>
0018 #include <linux/platform_device.h>
0019 #include <linux/errno.h>
0020 #include <linux/workqueue.h>
0021 #include <linux/i2c.h>
0022 #include <linux/mtd/mtd.h>
0023 #include <linux/mtd/platnand.h>
0024 #include <linux/mtd/partitions.h>
0025 #include <linux/mtd/physmap.h>
0026 #include <linux/input.h>
0027 #include <linux/spi/spi.h>
0028 #include <linux/mfd/tps65010.h>
0029 #include <linux/smc91x.h>
0030 #include <linux/omapfb.h>
0031 #include <linux/platform_data/gpio-omap.h>
0032 #include <linux/platform_data/keypad-omap.h>
0033 #include <linux/omap-dma.h>
0034 #include <linux/leds.h>
0035
0036 #include <asm/setup.h>
0037 #include <asm/page.h>
0038 #include <asm/mach-types.h>
0039 #include <asm/mach/arch.h>
0040 #include <asm/mach/map.h>
0041
0042 #include "tc.h"
0043 #include "mux.h"
0044 #include "flash.h"
0045 #include "hardware.h"
0046 #include "irqs.h"
0047 #include "usb.h"
0048 #include "common.h"
0049 #include "board-h3.h"
0050
0051 /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
0052 #define OMAP1710_ETHR_START     0x04000300
0053
0054 #define H3_TS_GPIO  48
0055
0056 static const unsigned int h3_keymap[] = {
0057     KEY(0, 0, KEY_LEFT),
0058     KEY(1, 0, KEY_RIGHT),
0059     KEY(2, 0, KEY_3),
0060     KEY(3, 0, KEY_F10),
0061     KEY(4, 0, KEY_F5),
0062     KEY(5, 0, KEY_9),
0063     KEY(0, 1, KEY_DOWN),
0064     KEY(1, 1, KEY_UP),
0065     KEY(2, 1, KEY_2),
0066     KEY(3, 1, KEY_F9),
0067     KEY(4, 1, KEY_F7),
0068     KEY(5, 1, KEY_0),
0069     KEY(0, 2, KEY_ENTER),
0070     KEY(1, 2, KEY_6),
0071     KEY(2, 2, KEY_1),
0072     KEY(3, 2, KEY_F2),
0073     KEY(4, 2, KEY_F6),
0074     KEY(5, 2, KEY_HOME),
0075     KEY(0, 3, KEY_8),
0076     KEY(1, 3, KEY_5),
0077     KEY(2, 3, KEY_F12),
0078     KEY(3, 3, KEY_F3),
0079     KEY(4, 3, KEY_F8),
0080     KEY(5, 3, KEY_END),
0081     KEY(0, 4, KEY_7),
0082     KEY(1, 4, KEY_4),
0083     KEY(2, 4, KEY_F11),
0084     KEY(3, 4, KEY_F1),
0085     KEY(4, 4, KEY_F4),
0086     KEY(5, 4, KEY_ESC),
0087     KEY(0, 5, KEY_F13),
0088     KEY(1, 5, KEY_F14),
0089     KEY(2, 5, KEY_F15),
0090     KEY(3, 5, KEY_F16),
0091     KEY(4, 5, KEY_SLEEP),
0092 };
0093
0094
0095 static struct mtd_partition nor_partitions[] = {
0096     /* bootloader (U-Boot, etc) in first sector */
0097     {
0098           .name     = "bootloader",
0099           .offset       = 0,
0100           .size     = SZ_128K,
0101           .mask_flags   = MTD_WRITEABLE, /* force read-only */
0102     },
0103     /* bootloader params in the next sector */
0104     {
0105           .name     = "params",
0106           .offset       = MTDPART_OFS_APPEND,
0107           .size     = SZ_128K,
0108           .mask_flags   = 0,
0109     },
0110     /* kernel */
0111     {
0112           .name     = "kernel",
0113           .offset       = MTDPART_OFS_APPEND,
0114           .size     = SZ_2M,
0115           .mask_flags   = 0
0116     },
0117     /* file system */
0118     {
0119           .name     = "filesystem",
0120           .offset       = MTDPART_OFS_APPEND,
0121           .size     = MTDPART_SIZ_FULL,
0122           .mask_flags   = 0
0123     }
0124 };
0125
0126 static struct physmap_flash_data nor_data = {
0127     .width      = 2,
0128     .set_vpp    = omap1_set_vpp,
0129     .parts      = nor_partitions,
0130     .nr_parts   = ARRAY_SIZE(nor_partitions),
0131 };
0132
0133 static struct resource nor_resource = {
0134     /* This is on CS3, wherever it's mapped */
0135     .flags      = IORESOURCE_MEM,
0136 };
0137
0138 static struct platform_device nor_device = {
0139     .name       = "physmap-flash",
0140     .id     = 0,
0141     .dev        = {
0142         .platform_data  = &nor_data,
0143     },
0144     .num_resources  = 1,
0145     .resource   = &nor_resource,
0146 };
0147
0148 static struct mtd_partition nand_partitions[] = {
0149 #if 0
0150     /* REVISIT: enable these partitions if you make NAND BOOT work */
0151     {
0152         .name       = "xloader",
0153         .offset     = 0,
0154         .size       = 64 * 1024,
0155         .mask_flags = MTD_WRITEABLE,    /* force read-only */
0156     },
0157     {
0158         .name       = "bootloader",
0159         .offset     = MTDPART_OFS_APPEND,
0160         .size       = 256 * 1024,
0161         .mask_flags = MTD_WRITEABLE,    /* force read-only */
0162     },
0163     {
0164         .name       = "params",
0165         .offset     = MTDPART_OFS_APPEND,
0166         .size       = 192 * 1024,
0167     },
0168     {
0169         .name       = "kernel",
0170         .offset     = MTDPART_OFS_APPEND,
0171         .size       = 2 * SZ_1M,
0172     },
0173 #endif
0174     {
0175         .name       = "filesystem",
0176         .size       = MTDPART_SIZ_FULL,
0177         .offset     = MTDPART_OFS_APPEND,
0178     },
0179 };
0180
0181 #define H3_NAND_RB_GPIO_PIN 10
0182
0183 static int nand_dev_ready(struct nand_chip *chip)
0184 {
0185     return gpio_get_value(H3_NAND_RB_GPIO_PIN);
0186 }
0187
0188 static struct platform_nand_data nand_platdata = {
0189     .chip   = {
0190         .nr_chips       = 1,
0191         .chip_offset        = 0,
0192         .nr_partitions      = ARRAY_SIZE(nand_partitions),
0193         .partitions     = nand_partitions,
0194         .options        = NAND_SAMSUNG_LP_OPTIONS,
0195     },
0196     .ctrl   = {
0197         .cmd_ctrl   = omap1_nand_cmd_ctl,
0198         .dev_ready  = nand_dev_ready,
0199
0200     },
0201 };
0202
0203 static struct resource nand_resource = {
0204     .flags      = IORESOURCE_MEM,
0205 };
0206
0207 static struct platform_device nand_device = {
0208     .name       = "gen_nand",
0209     .id     = 0,
0210     .dev        = {
0211         .platform_data  = &nand_platdata,
0212     },
0213     .num_resources  = 1,
0214     .resource   = &nand_resource,
0215 };
0216
0217 static struct smc91x_platdata smc91x_info = {
0218     .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
0219     .leda   = RPC_LED_100_10,
0220     .ledb   = RPC_LED_TX_RX,
0221 };
0222
0223 static struct resource smc91x_resources[] = {
0224     [0] = {
0225         .start  = OMAP1710_ETHR_START,      /* Physical */
0226         .end    = OMAP1710_ETHR_START + 0xf,
0227         .flags  = IORESOURCE_MEM,
0228     },
0229     [1] = {
0230         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
0231     },
0232 };
0233
0234 static struct platform_device smc91x_device = {
0235     .name       = "smc91x",
0236     .id     = 0,
0237     .dev    = {
0238         .platform_data  = &smc91x_info,
0239     },
0240     .num_resources  = ARRAY_SIZE(smc91x_resources),
0241     .resource   = smc91x_resources,
0242 };
0243
0244 static void __init h3_init_smc91x(void)
0245 {
0246     omap_cfg_reg(W15_1710_GPIO40);
0247     if (gpio_request(40, "SMC91x irq") < 0) {
0248         printk("Error requesting gpio 40 for smc91x irq\n");
0249         return;
0250     }
0251 }
0252
0253 #define GPTIMER_BASE        0xFFFB1400
0254 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
0255 #define GPTIMER_REGS_SIZE   0x46
0256
0257 static struct resource intlat_resources[] = {
0258     [0] = {
0259         .start  = GPTIMER_REGS(0),        /* Physical */
0260         .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
0261         .flags  = IORESOURCE_MEM,
0262     },
0263     [1] = {
0264         .start  = INT_1610_GPTIMER1,
0265         .end    = INT_1610_GPTIMER1,
0266         .flags  = IORESOURCE_IRQ,
0267     },
0268 };
0269
0270 static struct platform_device intlat_device = {
0271     .name      = "omap_intlat",
0272     .id      = 0,
0273     .num_resources  = ARRAY_SIZE(intlat_resources),
0274     .resource       = intlat_resources,
0275 };
0276
0277 static struct resource h3_kp_resources[] = {
0278     [0] = {
0279         .start  = INT_KEYBOARD,
0280         .end    = INT_KEYBOARD,
0281         .flags  = IORESOURCE_IRQ,
0282     },
0283 };
0284
0285 static const struct matrix_keymap_data h3_keymap_data = {
0286     .keymap     = h3_keymap,
0287     .keymap_size    = ARRAY_SIZE(h3_keymap),
0288 };
0289
0290 static struct omap_kp_platform_data h3_kp_data = {
0291     .rows       = 8,
0292     .cols       = 8,
0293     .keymap_data    = &h3_keymap_data,
0294     .rep        = true,
0295     .delay      = 9,
0296     .dbounce    = true,
0297 };
0298
0299 static struct platform_device h3_kp_device = {
0300     .name       = "omap-keypad",
0301     .id     = -1,
0302     .dev        = {
0303         .platform_data = &h3_kp_data,
0304     },
0305     .num_resources  = ARRAY_SIZE(h3_kp_resources),
0306     .resource   = h3_kp_resources,
0307 };
0308
0309 static struct platform_device h3_lcd_device = {
0310     .name       = "lcd_h3",
0311     .id     = -1,
0312 };
0313
0314 static struct spi_board_info h3_spi_board_info[] __initdata = {
0315     [0] = {
0316         .modalias   = "tsc2101",
0317         .bus_num    = 2,
0318         .chip_select    = 0,
0319         .max_speed_hz   = 16000000,
0320         /* .platform_data   = &tsc_platform_data, */
0321     },
0322 };
0323
0324 static const struct gpio_led h3_gpio_led_pins[] = {
0325     {
0326         .name       = "h3:red",
0327         .default_trigger = "heartbeat",
0328         .gpio       = 3,
0329     },
0330     {
0331         .name       = "h3:green",
0332         .default_trigger = "cpu0",
0333         .gpio       = OMAP_MPUIO(4),
0334     },
0335 };
0336
0337 static struct gpio_led_platform_data h3_gpio_led_data = {
0338     .leds       = h3_gpio_led_pins,
0339     .num_leds   = ARRAY_SIZE(h3_gpio_led_pins),
0340 };
0341
0342 static struct platform_device h3_gpio_leds = {
0343     .name   = "leds-gpio",
0344     .id = -1,
0345     .dev    = {
0346         .platform_data = &h3_gpio_led_data,
0347     },
0348 };
0349
0350 static struct platform_device *devices[] __initdata = {
0351     &nor_device,
0352     &nand_device,
0353         &smc91x_device,
0354     &intlat_device,
0355     &h3_kp_device,
0356     &h3_lcd_device,
0357     &h3_gpio_leds,
0358 };
0359
0360 static struct omap_usb_config h3_usb_config __initdata = {
0361     /* usb1 has a Mini-AB port and external isp1301 transceiver */
0362     .otg        = 2,
0363
0364 #if IS_ENABLED(CONFIG_USB_OMAP)
0365     .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
0366 #elif IS_ENABLED(CONFIG_USB_OHCI_HCD)
0367     /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
0368     .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
0369 #endif
0370
0371     .pins[1]    = 3,
0372 };
0373
0374 static const struct omap_lcd_config h3_lcd_config __initconst = {
0375     .ctrl_name  = "internal",
0376 };
0377
0378 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
0379        {
0380         I2C_BOARD_INFO("tps65013", 0x48),
0381        },
0382     {
0383         I2C_BOARD_INFO("isp1301_omap", 0x2d),
0384     },
0385 };
0386
0387 static void __init h3_init(void)
0388 {
0389     h3_init_smc91x();
0390
0391     /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
0392      * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
0393      * notice whether a NAND chip is enabled at probe time.
0394      *
0395      * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
0396      * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
0397      * to avoid probing every possible flash configuration...
0398      */
0399     nor_resource.end = nor_resource.start = omap_cs3_phys();
0400     nor_resource.end += SZ_32M - 1;
0401
0402     nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
0403     nand_resource.end += SZ_4K - 1;
0404     BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0);
0405     gpio_direction_input(H3_NAND_RB_GPIO_PIN);
0406
0407     /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
0408     /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
0409     omap_cfg_reg(V2_1710_GPIO10);
0410
0411     /* Mux pins for keypad */
0412     omap_cfg_reg(F18_1610_KBC0);
0413     omap_cfg_reg(D20_1610_KBC1);
0414     omap_cfg_reg(D19_1610_KBC2);
0415     omap_cfg_reg(E18_1610_KBC3);
0416     omap_cfg_reg(C21_1610_KBC4);
0417     omap_cfg_reg(G18_1610_KBR0);
0418     omap_cfg_reg(F19_1610_KBR1);
0419     omap_cfg_reg(H14_1610_KBR2);
0420     omap_cfg_reg(E20_1610_KBR3);
0421     omap_cfg_reg(E19_1610_KBR4);
0422     omap_cfg_reg(N19_1610_KBR5);
0423
0424     /* GPIO based LEDs */
0425     omap_cfg_reg(P18_1610_GPIO3);
0426     omap_cfg_reg(MPUIO4);
0427
0428     smc91x_resources[1].start = gpio_to_irq(40);
0429     smc91x_resources[1].end = gpio_to_irq(40);
0430     platform_add_devices(devices, ARRAY_SIZE(devices));
0431     h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
0432     spi_register_board_info(h3_spi_board_info,
0433                 ARRAY_SIZE(h3_spi_board_info));
0434     omap_serial_init();
0435     h3_i2c_board_info[1].irq = gpio_to_irq(14);
0436     omap_register_i2c_bus(1, 100, h3_i2c_board_info,
0437                   ARRAY_SIZE(h3_i2c_board_info));
0438     omap1_usb_init(&h3_usb_config);
0439     h3_mmc_init();
0440
0441     omapfb_set_lcd_config(&h3_lcd_config);
0442 }
0443
0444 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
0445     /* Maintainer: Texas Instruments, Inc. */
0446     .atag_offset    = 0x100,
0447     .map_io     = omap16xx_map_io,
0448     .init_early     = omap1_init_early,
0449     .init_irq   = omap1_init_irq,
0450     .handle_irq = omap1_handle_irq,
0451     .init_machine   = h3_init,
0452     .init_late  = omap1_init_late,
0453     .init_time  = omap1_timer_init,
0454     .restart    = omap1_restart,
0455 MACHINE_END