arm/mach-omap1/board-fsample.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * linux/arch/arm/mach-omap1/board-fsample.c
0004  *
0005  * Modified from board-perseus2.c
0006  *
0007  * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
0008  * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
0009  */
0010 #include <linux/gpio.h>
0011 #include <linux/kernel.h>
0012 #include <linux/init.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/delay.h>
0015 #include <linux/mtd/mtd.h>
0016 #include <linux/mtd/platnand.h>
0017 #include <linux/mtd/physmap.h>
0018 #include <linux/input.h>
0019 #include <linux/smc91x.h>
0020 #include <linux/omapfb.h>
0021
0022 #include <asm/mach-types.h>
0023 #include <asm/mach/arch.h>
0024 #include <asm/mach/map.h>
0025
0026 #include <linux/soc/ti/omap1-io.h>
0027 #include <linux/platform_data/keypad-omap.h>
0028 #include "tc.h"
0029
0030 #include "mux.h"
0031 #include "flash.h"
0032 #include "hardware.h"
0033 #include "iomap.h"
0034 #include "common.h"
0035 #include "fpga.h"
0036
0037 /* fsample is pretty close to p2-sample */
0038
0039 #define fsample_cpld_read(reg) __raw_readb(reg)
0040 #define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
0041
0042 #define FSAMPLE_CPLD_BASE    0xE8100000
0043 #define FSAMPLE_CPLD_SIZE    SZ_4K
0044 #define FSAMPLE_CPLD_START   0x05080000
0045
0046 #define FSAMPLE_CPLD_REG_A   (FSAMPLE_CPLD_BASE + 0x00)
0047 #define FSAMPLE_CPLD_SWITCH  (FSAMPLE_CPLD_BASE + 0x02)
0048 #define FSAMPLE_CPLD_UART    (FSAMPLE_CPLD_BASE + 0x02)
0049 #define FSAMPLE_CPLD_REG_B   (FSAMPLE_CPLD_BASE + 0x04)
0050 #define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
0051 #define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
0052
0053 #define FSAMPLE_CPLD_BIT_BT_RESET         0
0054 #define FSAMPLE_CPLD_BIT_LCD_RESET        1
0055 #define FSAMPLE_CPLD_BIT_CAM_PWDN         2
0056 #define FSAMPLE_CPLD_BIT_CHARGER_ENABLE   3
0057 #define FSAMPLE_CPLD_BIT_SD_MMC_EN        4
0058 #define FSAMPLE_CPLD_BIT_aGPS_PWREN       5
0059 #define FSAMPLE_CPLD_BIT_BACKLIGHT        6
0060 #define FSAMPLE_CPLD_BIT_aGPS_EN_RESET    7
0061 #define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N    8
0062 #define FSAMPLE_CPLD_BIT_OTG_RESET        9
0063
0064 #define fsample_cpld_set(bit) \
0065     fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
0066
0067 #define fsample_cpld_clear(bit) \
0068     fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
0069
0070 static const unsigned int fsample_keymap[] = {
0071     KEY(0, 0, KEY_UP),
0072     KEY(1, 0, KEY_RIGHT),
0073     KEY(2, 0, KEY_LEFT),
0074     KEY(3, 0, KEY_DOWN),
0075     KEY(4, 0, KEY_ENTER),
0076     KEY(0, 1, KEY_F10),
0077     KEY(1, 1, KEY_SEND),
0078     KEY(2, 1, KEY_END),
0079     KEY(3, 1, KEY_VOLUMEDOWN),
0080     KEY(4, 1, KEY_VOLUMEUP),
0081     KEY(5, 1, KEY_RECORD),
0082     KEY(0, 2, KEY_F9),
0083     KEY(1, 2, KEY_3),
0084     KEY(2, 2, KEY_6),
0085     KEY(3, 2, KEY_9),
0086     KEY(4, 2, KEY_KPDOT),
0087     KEY(0, 3, KEY_BACK),
0088     KEY(1, 3, KEY_2),
0089     KEY(2, 3, KEY_5),
0090     KEY(3, 3, KEY_8),
0091     KEY(4, 3, KEY_0),
0092     KEY(5, 3, KEY_KPSLASH),
0093     KEY(0, 4, KEY_HOME),
0094     KEY(1, 4, KEY_1),
0095     KEY(2, 4, KEY_4),
0096     KEY(3, 4, KEY_7),
0097     KEY(4, 4, KEY_KPASTERISK),
0098     KEY(5, 4, KEY_POWER),
0099 };
0100
0101 static struct smc91x_platdata smc91x_info = {
0102     .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
0103     .leda   = RPC_LED_100_10,
0104     .ledb   = RPC_LED_TX_RX,
0105 };
0106
0107 static struct resource smc91x_resources[] = {
0108     [0] = {
0109         .start  = H2P2_DBG_FPGA_ETHR_START, /* Physical */
0110         .end    = H2P2_DBG_FPGA_ETHR_START + 0xf,
0111         .flags  = IORESOURCE_MEM,
0112     },
0113     [1] = {
0114         .start  = INT_7XX_MPU_EXT_NIRQ,
0115         .end    = 0,
0116         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
0117     },
0118 };
0119
0120 static void __init fsample_init_smc91x(void)
0121 {
0122     __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
0123     mdelay(50);
0124     __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
0125            H2P2_DBG_FPGA_LAN_RESET);
0126     mdelay(50);
0127 }
0128
0129 static struct mtd_partition nor_partitions[] = {
0130     /* bootloader (U-Boot, etc) in first sector */
0131     {
0132           .name     = "bootloader",
0133           .offset       = 0,
0134           .size     = SZ_128K,
0135           .mask_flags   = MTD_WRITEABLE, /* force read-only */
0136     },
0137     /* bootloader params in the next sector */
0138     {
0139           .name     = "params",
0140           .offset       = MTDPART_OFS_APPEND,
0141           .size     = SZ_128K,
0142           .mask_flags   = 0,
0143     },
0144     /* kernel */
0145     {
0146           .name     = "kernel",
0147           .offset       = MTDPART_OFS_APPEND,
0148           .size     = SZ_2M,
0149           .mask_flags   = 0
0150     },
0151     /* rest of flash is a file system */
0152     {
0153           .name     = "rootfs",
0154           .offset       = MTDPART_OFS_APPEND,
0155           .size     = MTDPART_SIZ_FULL,
0156           .mask_flags   = 0
0157     },
0158 };
0159
0160 static struct physmap_flash_data nor_data = {
0161     .width      = 2,
0162     .set_vpp    = omap1_set_vpp,
0163     .parts      = nor_partitions,
0164     .nr_parts   = ARRAY_SIZE(nor_partitions),
0165 };
0166
0167 static struct resource nor_resource = {
0168     .start      = OMAP_CS0_PHYS,
0169     .end        = OMAP_CS0_PHYS + SZ_32M - 1,
0170     .flags      = IORESOURCE_MEM,
0171 };
0172
0173 static struct platform_device nor_device = {
0174     .name       = "physmap-flash",
0175     .id     = 0,
0176     .dev        = {
0177         .platform_data  = &nor_data,
0178     },
0179     .num_resources  = 1,
0180     .resource   = &nor_resource,
0181 };
0182
0183 #define FSAMPLE_NAND_RB_GPIO_PIN    62
0184
0185 static int nand_dev_ready(struct nand_chip *chip)
0186 {
0187     return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
0188 }
0189
0190 static struct platform_nand_data nand_data = {
0191     .chip   = {
0192         .nr_chips       = 1,
0193         .chip_offset        = 0,
0194         .options        = NAND_SAMSUNG_LP_OPTIONS,
0195     },
0196     .ctrl   = {
0197         .cmd_ctrl   = omap1_nand_cmd_ctl,
0198         .dev_ready  = nand_dev_ready,
0199     },
0200 };
0201
0202 static struct resource nand_resource = {
0203     .start      = OMAP_CS3_PHYS,
0204     .end        = OMAP_CS3_PHYS + SZ_4K - 1,
0205     .flags      = IORESOURCE_MEM,
0206 };
0207
0208 static struct platform_device nand_device = {
0209     .name       = "gen_nand",
0210     .id     = 0,
0211     .dev        = {
0212         .platform_data  = &nand_data,
0213     },
0214     .num_resources  = 1,
0215     .resource   = &nand_resource,
0216 };
0217
0218 static struct platform_device smc91x_device = {
0219     .name       = "smc91x",
0220     .id     = 0,
0221     .dev    = {
0222         .platform_data  = &smc91x_info,
0223     },
0224     .num_resources  = ARRAY_SIZE(smc91x_resources),
0225     .resource   = smc91x_resources,
0226 };
0227
0228 static struct resource kp_resources[] = {
0229     [0] = {
0230         .start  = INT_7XX_MPUIO_KEYPAD,
0231         .end    = INT_7XX_MPUIO_KEYPAD,
0232         .flags  = IORESOURCE_IRQ,
0233     },
0234 };
0235
0236 static const struct matrix_keymap_data fsample_keymap_data = {
0237     .keymap     = fsample_keymap,
0238     .keymap_size    = ARRAY_SIZE(fsample_keymap),
0239 };
0240
0241 static struct omap_kp_platform_data kp_data = {
0242     .rows       = 8,
0243     .cols       = 8,
0244     .keymap_data    = &fsample_keymap_data,
0245     .delay      = 4,
0246 };
0247
0248 static struct platform_device kp_device = {
0249     .name       = "omap-keypad",
0250     .id     = -1,
0251     .dev        = {
0252         .platform_data = &kp_data,
0253     },
0254     .num_resources  = ARRAY_SIZE(kp_resources),
0255     .resource   = kp_resources,
0256 };
0257
0258 static struct platform_device *devices[] __initdata = {
0259     &nor_device,
0260     &nand_device,
0261     &smc91x_device,
0262     &kp_device,
0263 };
0264
0265 static const struct omap_lcd_config fsample_lcd_config = {
0266     .ctrl_name  = "internal",
0267 };
0268
0269 static void __init omap_fsample_init(void)
0270 {
0271     /* Early, board-dependent init */
0272
0273     /*
0274      * Hold GSM Reset until needed
0275      */
0276     omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
0277
0278     /*
0279      * UARTs -> done automagically by 8250 driver
0280      */
0281
0282     /*
0283      * CSx timings, GPIO Mux ... setup
0284      */
0285
0286     /* Flash: CS0 timings setup */
0287     omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
0288     omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
0289
0290     /*
0291      * Ethernet support through the debug board
0292      * CS1 timings setup
0293      */
0294     omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
0295     omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
0296
0297     /*
0298      * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
0299      * It is used as the Ethernet controller interrupt
0300      */
0301     omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
0302             OMAP7XX_IO_CONF_9);
0303
0304     fsample_init_smc91x();
0305
0306     BUG_ON(gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0);
0307     gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
0308
0309     omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
0310     omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
0311
0312     /* Mux pins for keypad */
0313     omap_cfg_reg(E2_7XX_KBR0);
0314     omap_cfg_reg(J7_7XX_KBR1);
0315     omap_cfg_reg(E1_7XX_KBR2);
0316     omap_cfg_reg(F3_7XX_KBR3);
0317     omap_cfg_reg(D2_7XX_KBR4);
0318     omap_cfg_reg(C2_7XX_KBC0);
0319     omap_cfg_reg(D3_7XX_KBC1);
0320     omap_cfg_reg(E4_7XX_KBC2);
0321     omap_cfg_reg(F4_7XX_KBC3);
0322     omap_cfg_reg(E3_7XX_KBC4);
0323
0324     platform_add_devices(devices, ARRAY_SIZE(devices));
0325
0326     omap_serial_init();
0327     omap_register_i2c_bus(1, 100, NULL, 0);
0328
0329     omapfb_set_lcd_config(&fsample_lcd_config);
0330 }
0331
0332 /* Only FPGA needs to be mapped here. All others are done with ioremap */
0333 static struct map_desc omap_fsample_io_desc[] __initdata = {
0334     {
0335         .virtual    = H2P2_DBG_FPGA_BASE,
0336         .pfn        = __phys_to_pfn(H2P2_DBG_FPGA_START),
0337         .length     = H2P2_DBG_FPGA_SIZE,
0338         .type       = MT_DEVICE
0339     },
0340     {
0341         .virtual    = FSAMPLE_CPLD_BASE,
0342         .pfn        = __phys_to_pfn(FSAMPLE_CPLD_START),
0343         .length     = FSAMPLE_CPLD_SIZE,
0344         .type       = MT_DEVICE
0345     }
0346 };
0347
0348 static void __init omap_fsample_map_io(void)
0349 {
0350     omap15xx_map_io();
0351     iotable_init(omap_fsample_io_desc,
0352              ARRAY_SIZE(omap_fsample_io_desc));
0353 }
0354
0355 MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
0356 /* Maintainer: Brian Swetland <swetland@google.com> */
0357     .atag_offset    = 0x100,
0358     .map_io     = omap_fsample_map_io,
0359     .init_early = omap1_init_early,
0360     .init_irq   = omap1_init_irq,
0361     .handle_irq = omap1_handle_irq,
0362     .init_machine   = omap_fsample_init,
0363     .init_late  = omap1_init_late,
0364     .init_time  = omap1_timer_init,
0365     .restart    = omap1_restart,
0366 MACHINE_END