arm/mach-mvebu/headsmp.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * SMP support: Entry point for secondary CPUs
0004  *
0005  * Copyright (C) 2012 Marvell
0006  *
0007  * Yehuda Yitschak <yehuday@marvell.com>
0008  * Gregory CLEMENT <gregory.clement@free-electrons.com>
0009  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
0010  *
0011  * This file implements the assembly entry point for secondary CPUs in
0012  * an SMP kernel. The only thing we need to do is to add the CPU to
0013  * the coherency fabric by writing to 2 registers. Currently the base
0014  * register addresses are hard coded due to the early initialisation
0015  * problems.
0016  */
0017
0018 #include <linux/linkage.h>
0019 #include <linux/init.h>
0020
0021 #include <asm/assembler.h>
0022
0023 /*
0024  * Armada XP specific entry point for secondary CPUs.
0025  * We add the CPU to the coherency fabric and then jump to secondary
0026  * startup
0027  */
0028 ENTRY(armada_xp_secondary_startup)
0029  ARM_BE8(setend be )            @ go BE8 if entered LE
0030
0031     bl  ll_add_cpu_to_smp_group
0032
0033     bl  ll_enable_coherency
0034
0035     b   secondary_startup
0036
0037 ENDPROC(armada_xp_secondary_startup)