arm/mach-mv78xx0/bridge-regs.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002
0003 #ifndef __ASM_ARCH_BRIDGE_REGS_H
0004 #define __ASM_ARCH_BRIDGE_REGS_H
0005
0006 #include "mv78xx0.h"
0007
0008 #define CPU_CONTROL     (BRIDGE_VIRT_BASE + 0x0104)
0009 #define L2_WRITETHROUGH     0x00020000
0010
0011 #define RSTOUTn_MASK        (BRIDGE_VIRT_BASE + 0x0108)
0012 #define RSTOUTn_MASK_PHYS   (BRIDGE_PHYS_BASE + 0x0108)
0013 #define SOFT_RESET_OUT_EN   0x00000004
0014
0015 #define SYSTEM_SOFT_RESET   (BRIDGE_VIRT_BASE + 0x010c)
0016 #define SOFT_RESET      0x00000001
0017
0018 #define BRIDGE_INT_TIMER1_CLR   (~0x0004)
0019
0020 #define IRQ_VIRT_BASE       (BRIDGE_VIRT_BASE + 0x0200)
0021 #define IRQ_CAUSE_ERR_OFF   0x0000
0022 #define IRQ_CAUSE_LOW_OFF   0x0004
0023 #define IRQ_CAUSE_HIGH_OFF  0x0008
0024 #define IRQ_MASK_ERR_OFF    0x000c
0025 #define IRQ_MASK_LOW_OFF    0x0010
0026 #define IRQ_MASK_HIGH_OFF   0x0014
0027
0028 #define TIMER_VIRT_BASE     (BRIDGE_VIRT_BASE + 0x0300)
0029 #define TIMER_PHYS_BASE     (BRIDGE_PHYS_BASE + 0x0300)
0030
0031 #endif