arm/mach-mmp/regs-timers.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *   Timers Module
0004  */
0005
0006 #ifndef __ASM_MACH_REGS_TIMERS_H
0007 #define __ASM_MACH_REGS_TIMERS_H
0008
0009 #include "addr-map.h"
0010
0011 #define TIMERS1_VIRT_BASE   (APB_VIRT_BASE + 0x14000)
0012 #define TIMERS2_VIRT_BASE   (APB_VIRT_BASE + 0x16000)
0013
0014 #define TMR_CCR     (0x0000)
0015 #define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2))
0016 #define TMR_CR(n)   (0x0028 + ((n) << 2))
0017 #define TMR_SR(n)   (0x0034 + ((n) << 2))
0018 #define TMR_IER(n)  (0x0040 + ((n) << 2))
0019 #define TMR_PLVR(n) (0x004c + ((n) << 2))
0020 #define TMR_PLCR(n) (0x0058 + ((n) << 2))
0021 #define TMR_WMER    (0x0064)
0022 #define TMR_WMR     (0x0068)
0023 #define TMR_WVR     (0x006c)
0024 #define TMR_WSR     (0x0070)
0025 #define TMR_ICR(n)  (0x0074 + ((n) << 2))
0026 #define TMR_WICR    (0x0080)
0027 #define TMR_CER     (0x0084)
0028 #define TMR_CMR     (0x0088)
0029 #define TMR_ILR(n)  (0x008c + ((n) << 2))
0030 #define TMR_WCR     (0x0098)
0031 #define TMR_WFAR    (0x009c)
0032 #define TMR_WSAR    (0x00A0)
0033 #define TMR_CVWR(n) (0x00A4 + ((n) << 2))
0034
0035 #define TMR_CCR_CS_0(x) (((x) & 0x3) << 0)
0036 #define TMR_CCR_CS_1(x) (((x) & 0x7) << 2)
0037 #define TMR_CCR_CS_2(x) (((x) & 0x3) << 5)
0038
0039 #endif /* __ASM_MACH_REGS_TIMERS_H */