arm/mach-mmp/pxa910.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/mach-mmp/pxa910.c
0004  *
0005  *  Code specific to PXA910
0006  */
0007 #include <linux/clk/mmp.h>
0008 #include <linux/module.h>
0009 #include <linux/kernel.h>
0010 #include <linux/init.h>
0011 #include <linux/list.h>
0012 #include <linux/io.h>
0013 #include <linux/irq.h>
0014 #include <linux/irqchip/mmp.h>
0015 #include <linux/platform_device.h>
0016
0017 #include <asm/hardware/cache-tauros2.h>
0018 #include <asm/mach/time.h>
0019 #include "addr-map.h"
0020 #include "regs-apbc.h"
0021 #include <linux/soc/mmp/cputype.h>
0022 #include "irqs.h"
0023 #include "mfp.h"
0024 #include "devices.h"
0025 #include "pm-pxa910.h"
0026 #include "pxa910.h"
0027
0028 #include "common.h"
0029
0030 #define MFPR_VIRT_BASE  (APB_VIRT_BASE + 0x1e000)
0031
0032 static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
0033 {
0034     MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
0035     MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
0036     MFP_ADDR_X(GPIO100, GPIO109, 0x238),
0037
0038     MFP_ADDR(GPIO123, 0xcc),
0039     MFP_ADDR(GPIO124, 0xd0),
0040
0041     MFP_ADDR(DF_IO0, 0x40),
0042     MFP_ADDR(DF_IO1, 0x3c),
0043     MFP_ADDR(DF_IO2, 0x38),
0044     MFP_ADDR(DF_IO3, 0x34),
0045     MFP_ADDR(DF_IO4, 0x30),
0046     MFP_ADDR(DF_IO5, 0x2c),
0047     MFP_ADDR(DF_IO6, 0x28),
0048     MFP_ADDR(DF_IO7, 0x24),
0049     MFP_ADDR(DF_IO8, 0x20),
0050     MFP_ADDR(DF_IO9, 0x1c),
0051     MFP_ADDR(DF_IO10, 0x18),
0052     MFP_ADDR(DF_IO11, 0x14),
0053     MFP_ADDR(DF_IO12, 0x10),
0054     MFP_ADDR(DF_IO13, 0xc),
0055     MFP_ADDR(DF_IO14, 0x8),
0056     MFP_ADDR(DF_IO15, 0x4),
0057
0058     MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
0059     MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
0060     MFP_ADDR(SM_nCS0, 0x4c),
0061     MFP_ADDR(SM_nCS1, 0x50),
0062     MFP_ADDR(DF_WEn, 0x54),
0063     MFP_ADDR(DF_REn, 0x58),
0064     MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
0065     MFP_ADDR(DF_ALE_SM_WEn, 0x60),
0066     MFP_ADDR(SM_SCLK, 0x64),
0067     MFP_ADDR(DF_RDY0, 0x68),
0068     MFP_ADDR(SM_BE0, 0x6c),
0069     MFP_ADDR(SM_BE1, 0x70),
0070     MFP_ADDR(SM_ADV, 0x74),
0071     MFP_ADDR(DF_RDY1, 0x78),
0072     MFP_ADDR(SM_ADVMUX, 0x7c),
0073     MFP_ADDR(SM_RDY, 0x80),
0074
0075     MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
0076
0077     MFP_ADDR_END,
0078 };
0079
0080 void __init pxa910_init_irq(void)
0081 {
0082     icu_init_irq();
0083 #ifdef CONFIG_PM
0084     icu_irq_chip.irq_set_wake = pxa910_set_wake;
0085 #endif
0086 }
0087
0088 static int __init pxa910_init(void)
0089 {
0090     if (cpu_is_pxa910()) {
0091 #ifdef CONFIG_CACHE_TAUROS2
0092         tauros2_init(0);
0093 #endif
0094         mfp_init_base(MFPR_VIRT_BASE);
0095         mfp_init_addr(pxa910_mfp_addr_map);
0096         pxa910_clk_init(APB_PHYS_BASE + 0x50000,
0097                 AXI_PHYS_BASE + 0x82800,
0098                 APB_PHYS_BASE + 0x15000,
0099                 APB_PHYS_BASE + 0x3b000);
0100     }
0101
0102     return 0;
0103 }
0104 postcore_initcall(pxa910_init);
0105
0106 /* system timer - clock enabled, 3.25MHz */
0107 #define TIMER_CLK_RST   (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
0108 #define APBC_TIMERS APBC_REG(0x34)
0109
0110 void __init pxa910_timer_init(void)
0111 {
0112     /* reset and configure */
0113     __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
0114     __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
0115
0116     mmp_timer_init(IRQ_PXA910_AP1_TIMER1, 3250000);
0117 }
0118
0119 /* on-chip devices */
0120
0121 /* NOTE: there are totally 3 UARTs on PXA910:
0122  *
0123  *   UART1   - Slow UART (can be used both by AP and CP)
0124  *   UART2/3 - Fast UART
0125  *
0126  * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
0127  * they are re-ordered as:
0128  *
0129  *   pxa910_device_uart1 - UART2 as FFUART
0130  *   pxa910_device_uart2 - UART3 as BTUART
0131  *
0132  * UART1 is not used by AP for the moment.
0133  */
0134 PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
0135 PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
0136 PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
0137 PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
0138 PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
0139 PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
0140 PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
0141 PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
0142 PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
0143 PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec);
0144 PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0);
0145 PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0);
0146
0147 struct resource pxa910_resource_gpio[] = {
0148     {
0149         .start  = 0xd4019000,
0150         .end    = 0xd4019fff,
0151         .flags  = IORESOURCE_MEM,
0152     }, {
0153         .start  = IRQ_PXA910_AP_GPIO,
0154         .end    = IRQ_PXA910_AP_GPIO,
0155         .name   = "gpio_mux",
0156         .flags  = IORESOURCE_IRQ,
0157     },
0158 };
0159
0160 struct platform_device pxa910_device_gpio = {
0161     .name       = "mmp-gpio",
0162     .id     = -1,
0163     .num_resources  = ARRAY_SIZE(pxa910_resource_gpio),
0164     .resource   = pxa910_resource_gpio,
0165 };
0166
0167 static struct resource pxa910_resource_rtc[] = {
0168     {
0169         .start  = 0xd4010000,
0170         .end    = 0xd401003f,
0171         .flags  = IORESOURCE_MEM,
0172     }, {
0173         .start  = IRQ_PXA910_RTC_INT,
0174         .end    = IRQ_PXA910_RTC_INT,
0175         .name   = "rtc 1Hz",
0176         .flags  = IORESOURCE_IRQ,
0177     }, {
0178         .start  = IRQ_PXA910_RTC_ALARM,
0179         .end    = IRQ_PXA910_RTC_ALARM,
0180         .name   = "rtc alarm",
0181         .flags  = IORESOURCE_IRQ,
0182     },
0183 };
0184
0185 struct platform_device pxa910_device_rtc = {
0186     .name       = "sa1100-rtc",
0187     .id     = -1,
0188     .num_resources  = ARRAY_SIZE(pxa910_resource_rtc),
0189     .resource   = pxa910_resource_rtc,
0190 };