arm/mach-mmp/pxa168.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/mach-mmp/pxa168.c
0004  *
0005  *  Code specific to PXA168
0006  */
0007 #include <linux/module.h>
0008 #include <linux/kernel.h>
0009 #include <linux/init.h>
0010 #include <linux/list.h>
0011 #include <linux/io.h>
0012 #include <linux/clk.h>
0013 #include <linux/clk/mmp.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/platform_data/mv_usb.h>
0016 #include <linux/dma-mapping.h>
0017
0018 #include <asm/mach/time.h>
0019 #include <asm/system_misc.h>
0020
0021 #include "addr-map.h"
0022 #include "common.h"
0023 #include <linux/soc/mmp/cputype.h>
0024 #include "devices.h"
0025 #include "irqs.h"
0026 #include "mfp.h"
0027 #include "pxa168.h"
0028 #include "regs-apbc.h"
0029 #include "regs-apmu.h"
0030 #include "regs-usb.h"
0031
0032 #define MFPR_VIRT_BASE  (APB_VIRT_BASE + 0x1e000)
0033
0034 static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
0035 {
0036     MFP_ADDR_X(GPIO0,   GPIO36,  0x04c),
0037     MFP_ADDR_X(GPIO37,  GPIO55,  0x000),
0038     MFP_ADDR_X(GPIO56,  GPIO123, 0x0e0),
0039     MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
0040
0041     MFP_ADDR_END,
0042 };
0043
0044 void __init pxa168_init_irq(void)
0045 {
0046     icu_init_irq();
0047 }
0048
0049 static int __init pxa168_init(void)
0050 {
0051     if (cpu_is_pxa168()) {
0052         mfp_init_base(MFPR_VIRT_BASE);
0053         mfp_init_addr(pxa168_mfp_addr_map);
0054         pxa168_clk_init(APB_PHYS_BASE + 0x50000,
0055                 AXI_PHYS_BASE + 0x82800,
0056                 APB_PHYS_BASE + 0x15000);
0057     }
0058
0059     return 0;
0060 }
0061 postcore_initcall(pxa168_init);
0062
0063 /* system timer - clock enabled, 3.25MHz */
0064 #define TIMER_CLK_RST   (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
0065 #define APBC_TIMERS APBC_REG(0x34)
0066
0067 void __init pxa168_timer_init(void)
0068 {
0069     /* this is early, we have to initialize the CCU registers by
0070      * ourselves instead of using clk_* API. Clock rate is defined
0071      * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
0072      */
0073     __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
0074
0075     /* 3.25MHz, bus/functional clock enabled, release reset */
0076     __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
0077
0078     mmp_timer_init(IRQ_PXA168_TIMER1, 3250000);
0079 }
0080
0081 void pxa168_clear_keypad_wakeup(void)
0082 {
0083     uint32_t val;
0084     uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
0085
0086     /* wake event clear is needed in order to clear keypad interrupt */
0087     val = __raw_readl(APMU_WAKE_CLR);
0088     __raw_writel(val |  mask, APMU_WAKE_CLR);
0089 }
0090
0091 /* on-chip devices */
0092 PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
0093 PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
0094 PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
0095 PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
0096 PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
0097 PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
0098 PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
0099 PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
0100 PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
0101 PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
0102 PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
0103 PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
0104 PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
0105 PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
0106 PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
0107 PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
0108 PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
0109 PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
0110
0111 struct resource pxa168_resource_gpio[] = {
0112     {
0113         .start  = 0xd4019000,
0114         .end    = 0xd4019fff,
0115         .flags  = IORESOURCE_MEM,
0116     }, {
0117         .start  = IRQ_PXA168_GPIOX,
0118         .end    = IRQ_PXA168_GPIOX,
0119         .name   = "gpio_mux",
0120         .flags  = IORESOURCE_IRQ,
0121     },
0122 };
0123
0124 struct platform_device pxa168_device_gpio = {
0125     .name       = "mmp-gpio",
0126     .id     = -1,
0127     .num_resources  = ARRAY_SIZE(pxa168_resource_gpio),
0128     .resource   = pxa168_resource_gpio,
0129 };
0130
0131 struct resource pxa168_usb_host_resources[] = {
0132     /* USB Host conroller register base */
0133     [0] = {
0134         .start  = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
0135         .end    = PXA168_U2H_REGBASE + USB_REG_RANGE,
0136         .flags  = IORESOURCE_MEM,
0137         .name   = "capregs",
0138     },
0139     /* USB PHY register base */
0140     [1] = {
0141         .start  = PXA168_U2H_PHYBASE,
0142         .end    = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
0143         .flags  = IORESOURCE_MEM,
0144         .name   = "phyregs",
0145     },
0146     [2] = {
0147         .start  = IRQ_PXA168_USB2,
0148         .end    = IRQ_PXA168_USB2,
0149         .flags  = IORESOURCE_IRQ,
0150     },
0151 };
0152
0153 static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
0154 struct platform_device pxa168_device_usb_host = {
0155     .name = "pxa-sph",
0156     .id   = -1,
0157     .dev  = {
0158         .dma_mask = &pxa168_usb_host_dmamask,
0159         .coherent_dma_mask = DMA_BIT_MASK(32),
0160     },
0161
0162     .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
0163     .resource      = pxa168_usb_host_resources,
0164 };
0165
0166 int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
0167 {
0168     pxa168_device_usb_host.dev.platform_data = pdata;
0169     return platform_device_register(&pxa168_device_usb_host);
0170 }
0171
0172 void pxa168_restart(enum reboot_mode mode, const char *cmd)
0173 {
0174     soft_restart(0xffff0000);
0175 }