arm/mach-iop32x/irqs.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Author:  Rory Bolt <rorybolt@pacbell.net>
0004  * Copyright:   (C) 2002 Rory Bolt
0005  */
0006
0007 #ifndef __IOP32X_IRQS_H
0008 #define __IOP32X_IRQS_H
0009
0010 /* Interrupts in Linux start at 1, hardware starts at 0 */
0011
0012 #define IOP_IRQ(x) ((x) + 1)
0013
0014 /*
0015  * IOP80321 chipset interrupts
0016  */
0017 #define IRQ_IOP32X_DMA0_EOT IOP_IRQ(0)
0018 #define IRQ_IOP32X_DMA0_EOC IOP_IRQ(1)
0019 #define IRQ_IOP32X_DMA1_EOT IOP_IRQ(2)
0020 #define IRQ_IOP32X_DMA1_EOC IOP_IRQ(3)
0021 #define IRQ_IOP32X_AA_EOT   IOP_IRQ(6)
0022 #define IRQ_IOP32X_AA_EOC   IOP_IRQ(7)
0023 #define IRQ_IOP32X_CORE_PMON    IOP_IRQ(8)
0024 #define IRQ_IOP32X_TIMER0   IOP_IRQ(9)
0025 #define IRQ_IOP32X_TIMER1   IOP_IRQ(10)
0026 #define IRQ_IOP32X_I2C_0    IOP_IRQ(11)
0027 #define IRQ_IOP32X_I2C_1    IOP_IRQ(12)
0028 #define IRQ_IOP32X_MESSAGING    IOP_IRQ(13)
0029 #define IRQ_IOP32X_ATU_BIST IOP_IRQ(14)
0030 #define IRQ_IOP32X_PERFMON  IOP_IRQ(15)
0031 #define IRQ_IOP32X_CORE_PMU IOP_IRQ(16)
0032 #define IRQ_IOP32X_BIU_ERR  IOP_IRQ(17)
0033 #define IRQ_IOP32X_ATU_ERR  IOP_IRQ(18)
0034 #define IRQ_IOP32X_MCU_ERR  IOP_IRQ(19)
0035 #define IRQ_IOP32X_DMA0_ERR IOP_IRQ(20)
0036 #define IRQ_IOP32X_DMA1_ERR IOP_IRQ(21)
0037 #define IRQ_IOP32X_AA_ERR   IOP_IRQ(23)
0038 #define IRQ_IOP32X_MSG_ERR  IOP_IRQ(24)
0039 #define IRQ_IOP32X_SSP      IOP_IRQ(25)
0040 #define IRQ_IOP32X_XINT0    IOP_IRQ(27)
0041 #define IRQ_IOP32X_XINT1    IOP_IRQ(28)
0042 #define IRQ_IOP32X_XINT2    IOP_IRQ(29)
0043 #define IRQ_IOP32X_XINT3    IOP_IRQ(30)
0044 #define IRQ_IOP32X_HPI      IOP_IRQ(31)
0045
0046 #define IOP32X_NR_IRQS      (IRQ_IOP32X_HPI + 1)
0047
0048 #endif