arm/mach-iop32x/iq80321.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * arch/arm/mach-iop32x/iq80321.c
0004  *
0005  * Board support code for the Intel IQ80321 platform.
0006  *
0007  * Author: Rory Bolt <rorybolt@pacbell.net>
0008  * Copyright (C) 2002 Rory Bolt
0009  * Copyright (C) 2004 Intel Corp.
0010  */
0011
0012 #include <linux/mm.h>
0013 #include <linux/init.h>
0014 #include <linux/kernel.h>
0015 #include <linux/pci.h>
0016 #include <linux/string.h>
0017 #include <linux/serial_core.h>
0018 #include <linux/serial_8250.h>
0019 #include <linux/mtd/physmap.h>
0020 #include <linux/platform_device.h>
0021 #include <linux/io.h>
0022 #include <linux/gpio/machine.h>
0023 #include <asm/irq.h>
0024 #include <asm/mach/arch.h>
0025 #include <asm/mach/map.h>
0026 #include <asm/mach/pci.h>
0027 #include <asm/mach/time.h>
0028 #include <asm/mach-types.h>
0029 #include <asm/page.h>
0030
0031 #include "hardware.h"
0032 #include "irqs.h"
0033 #include "gpio-iop32x.h"
0034
0035 /*
0036  * IQ80321 timer tick configuration.
0037  */
0038 static void __init iq80321_timer_init(void)
0039 {
0040     /* 33.333 MHz crystal.  */
0041     iop_init_time(200000000);
0042 }
0043
0044
0045 /*
0046  * IQ80321 I/O.
0047  */
0048 static struct map_desc iq80321_io_desc[] __initdata = {
0049     {   /* on-board devices */
0050         .virtual    = IQ80321_UART,
0051         .pfn        = __phys_to_pfn(IQ80321_UART),
0052         .length     = 0x00100000,
0053         .type       = MT_DEVICE,
0054     },
0055 };
0056
0057 void __init iq80321_map_io(void)
0058 {
0059     iop3xx_map_io();
0060     iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
0061 }
0062
0063
0064 /*
0065  * IQ80321 PCI.
0066  */
0067 static int __init
0068 iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
0069 {
0070     int irq;
0071
0072     if ((slot == 2 || slot == 6) && pin == 1) {
0073         /* PCI-X Slot INTA */
0074         irq = IRQ_IOP32X_XINT2;
0075     } else if ((slot == 2 || slot == 6) && pin == 2) {
0076         /* PCI-X Slot INTA */
0077         irq = IRQ_IOP32X_XINT3;
0078     } else if ((slot == 2 || slot == 6) && pin == 3) {
0079         /* PCI-X Slot INTA */
0080         irq = IRQ_IOP32X_XINT0;
0081     } else if ((slot == 2 || slot == 6) && pin == 4) {
0082         /* PCI-X Slot INTA */
0083         irq = IRQ_IOP32X_XINT1;
0084     } else if (slot == 4 || slot == 8) {
0085         /* Gig-E */
0086         irq = IRQ_IOP32X_XINT0;
0087     } else {
0088         printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
0089             "device PCI:%d:%d:%d\n", dev->bus->number,
0090             PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
0091         irq = -1;
0092     }
0093
0094     return irq;
0095 }
0096
0097 static struct hw_pci iq80321_pci __initdata = {
0098     .nr_controllers = 1,
0099     .ops        = &iop3xx_ops,
0100     .setup      = iop3xx_pci_setup,
0101     .preinit    = iop3xx_pci_preinit_cond,
0102     .map_irq    = iq80321_pci_map_irq,
0103 };
0104
0105 static int __init iq80321_pci_init(void)
0106 {
0107     if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
0108         machine_is_iq80321())
0109         pci_common_init(&iq80321_pci);
0110
0111     return 0;
0112 }
0113
0114 subsys_initcall(iq80321_pci_init);
0115
0116
0117 /*
0118  * IQ80321 machine initialisation.
0119  */
0120 static struct physmap_flash_data iq80321_flash_data = {
0121     .width      = 1,
0122 };
0123
0124 static struct resource iq80321_flash_resource = {
0125     .start      = 0xf0000000,
0126     .end        = 0xf07fffff,
0127     .flags      = IORESOURCE_MEM,
0128 };
0129
0130 static struct platform_device iq80321_flash_device = {
0131     .name       = "physmap-flash",
0132     .id     = 0,
0133     .dev        = {
0134         .platform_data  = &iq80321_flash_data,
0135     },
0136     .num_resources  = 1,
0137     .resource   = &iq80321_flash_resource,
0138 };
0139
0140 static struct plat_serial8250_port iq80321_serial_port[] = {
0141     {
0142         .mapbase    = IQ80321_UART,
0143         .membase    = (char *)IQ80321_UART,
0144         .irq        = IRQ_IOP32X_XINT1,
0145         .flags      = UPF_SKIP_TEST,
0146         .iotype     = UPIO_MEM,
0147         .regshift   = 0,
0148         .uartclk    = 1843200,
0149     },
0150     { },
0151 };
0152
0153 static struct resource iq80321_uart_resource = {
0154     .start      = IQ80321_UART,
0155     .end        = IQ80321_UART + 7,
0156     .flags      = IORESOURCE_MEM,
0157 };
0158
0159 static struct platform_device iq80321_serial_device = {
0160     .name       = "serial8250",
0161     .id     = PLAT8250_DEV_PLATFORM,
0162     .dev        = {
0163         .platform_data      = iq80321_serial_port,
0164     },
0165     .num_resources  = 1,
0166     .resource   = &iq80321_uart_resource,
0167 };
0168
0169 static void __init iq80321_init_machine(void)
0170 {
0171     register_iop32x_gpio();
0172     gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
0173     gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
0174     platform_device_register(&iop3xx_i2c0_device);
0175     platform_device_register(&iop3xx_i2c1_device);
0176     platform_device_register(&iq80321_flash_device);
0177     platform_device_register(&iq80321_serial_device);
0178     platform_device_register(&iop3xx_dma_0_channel);
0179     platform_device_register(&iop3xx_dma_1_channel);
0180     platform_device_register(&iop3xx_aau_channel);
0181 }
0182
0183 MACHINE_START(IQ80321, "Intel IQ80321")
0184     /* Maintainer: Intel Corp. */
0185     .atag_offset    = 0x100,
0186     .nr_irqs    = IOP32X_NR_IRQS,
0187     .map_io     = iq80321_map_io,
0188     .init_irq   = iop32x_init_irq,
0189     .init_time  = iq80321_timer_init,
0190     .init_machine   = iq80321_init_machine,
0191     .restart    = iop3xx_restart,
0192 MACHINE_END