arm/mach-imx/mach-imx7ulp.c

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (C) 2016 Freescale Semiconductor, Inc.
0004  * Copyright 2017-2018 NXP
0005  *   Author: Dong Aisheng <aisheng.dong@nxp.com>
0006  */
0007
0008 #include <linux/irqchip.h>
0009 #include <linux/mfd/syscon.h>
0010 #include <linux/of_platform.h>
0011 #include <linux/regmap.h>
0012 #include <asm/mach/arch.h>
0013
0014 #include "common.h"
0015 #include "cpuidle.h"
0016 #include "hardware.h"
0017
0018 #define SIM_JTAG_ID_REG     0x8c
0019
0020 static void __init imx7ulp_set_revision(void)
0021 {
0022     struct regmap *sim;
0023     u32 revision;
0024
0025     sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim");
0026     if (IS_ERR(sim)) {
0027         pr_warn("failed to find fsl,imx7ulp-sim regmap!\n");
0028         return;
0029     }
0030
0031     if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) {
0032         pr_warn("failed to read sim regmap!\n");
0033         return;
0034     }
0035
0036     /*
0037      * bit[31:28] of JTAG_ID register defines revision as below from B0:
0038      * 0001        B0
0039      * 0010        B1
0040      * 0011        B2
0041      */
0042     switch (revision >> 28) {
0043     case 1:
0044         imx_set_soc_revision(IMX_CHIP_REVISION_2_0);
0045         break;
0046     case 2:
0047         imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
0048         break;
0049     case 3:
0050         imx_set_soc_revision(IMX_CHIP_REVISION_2_2);
0051         break;
0052     default:
0053         imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
0054         break;
0055     }
0056 }
0057
0058 static void __init imx7ulp_init_machine(void)
0059 {
0060     imx7ulp_pm_init();
0061
0062     mxc_set_cpu_type(MXC_CPU_IMX7ULP);
0063     imx7ulp_set_revision();
0064     of_platform_default_populate(NULL, NULL, NULL);
0065 }
0066
0067 static const char *const imx7ulp_dt_compat[] __initconst = {
0068     "fsl,imx7ulp",
0069     NULL,
0070 };
0071
0072 static void __init imx7ulp_init_late(void)
0073 {
0074     if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
0075         platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
0076
0077     imx7ulp_cpuidle_init();
0078 }
0079
0080 DT_MACHINE_START(IMX7ulp, "Freescale i.MX7ULP (Device Tree)")
0081     .init_machine   = imx7ulp_init_machine,
0082     .dt_compat  = imx7ulp_dt_compat,
0083     .init_late  = imx7ulp_init_late,
0084 MACHINE_END