arm/mach-imx/mach-imx7d.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2015 Freescale Semiconductor, Inc.
0004  */
0005 #include <linux/irqchip.h>
0006 #include <linux/mfd/syscon.h>
0007 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
0008 #include <linux/of_platform.h>
0009 #include <linux/phy.h>
0010 #include <linux/regmap.h>
0011
0012 #include <asm/mach/arch.h>
0013 #include <asm/mach/map.h>
0014
0015 #include "common.h"
0016
0017 static int bcm54220_phy_fixup(struct phy_device *dev)
0018 {
0019     /* enable RXC skew select RGMII copper mode */
0020     phy_write(dev, 0x1e, 0x21);
0021     phy_write(dev, 0x1f, 0x7ea8);
0022     phy_write(dev, 0x1e, 0x2f);
0023     phy_write(dev, 0x1f, 0x71b7);
0024
0025     return 0;
0026 }
0027
0028 #define PHY_ID_BCM54220 0x600d8589
0029
0030 static void __init imx7d_enet_phy_init(void)
0031 {
0032     if (IS_BUILTIN(CONFIG_PHYLIB)) {
0033         phy_register_fixup_for_uid(PHY_ID_BCM54220, 0xffffffff,
0034                        bcm54220_phy_fixup);
0035     }
0036 }
0037
0038 static void __init imx7d_enet_clk_sel(void)
0039 {
0040     struct regmap *gpr;
0041
0042     gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr");
0043     if (!IS_ERR(gpr)) {
0044         regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0);
0045         regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0);
0046     } else {
0047         pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n");
0048     }
0049 }
0050
0051 static inline void imx7d_enet_init(void)
0052 {
0053     imx7d_enet_phy_init();
0054     imx7d_enet_clk_sel();
0055 }
0056
0057 static void __init imx7d_init_machine(void)
0058 {
0059     imx_anatop_init();
0060     imx7d_enet_init();
0061 }
0062
0063 static void __init imx7d_init_late(void)
0064 {
0065     if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
0066         platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
0067 }
0068
0069 static void __init imx7d_init_irq(void)
0070 {
0071     imx_init_revision_from_anatop();
0072     imx7_src_init();
0073     irqchip_init();
0074 }
0075
0076 static const char *const imx7d_dt_compat[] __initconst = {
0077     "fsl,imx7d",
0078     "fsl,imx7s",
0079     NULL,
0080 };
0081
0082 DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
0083     .smp            = smp_ops(imx7_smp_ops),
0084     .init_irq   = imx7d_init_irq,
0085     .init_machine   = imx7d_init_machine,
0086     .init_late      = imx7d_init_late,
0087     .dt_compat  = imx7d_dt_compat,
0088 MACHINE_END