arm/mach-imx/mach-imx51.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
0004  * Copyright 2011 Linaro Ltd.
0005  */
0006
0007 #include <linux/io.h>
0008 #include <linux/irq.h>
0009 #include <linux/of_address.h>
0010 #include <linux/of_irq.h>
0011 #include <linux/of_platform.h>
0012 #include <asm/mach/arch.h>
0013 #include <asm/mach/time.h>
0014
0015 #include "common.h"
0016 #include "hardware.h"
0017
0018 static void __init imx51_init_early(void)
0019 {
0020     mxc_set_cpu_type(MXC_CPU_MX51);
0021 }
0022
0023 /*
0024  * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
0025  * the Freescale marketing division. However this did not remove the
0026  * hardware from the chip which still needs to be configured for proper
0027  * IPU support.
0028  */
0029 #define MX51_MIPI_HSC_BASE 0x83fdc000
0030 static void __init imx51_ipu_mipi_setup(void)
0031 {
0032     void __iomem *hsc_addr;
0033
0034     hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K);
0035     WARN_ON(!hsc_addr);
0036
0037     /* setup MIPI module to legacy mode */
0038     imx_writel(0xf00, hsc_addr);
0039
0040     /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
0041     imx_writel(imx_readl(hsc_addr + 0x800) | 0x30ff, hsc_addr + 0x800);
0042
0043     iounmap(hsc_addr);
0044 }
0045
0046 static void __init imx51_m4if_setup(void)
0047 {
0048     void __iomem *m4if_base;
0049     struct device_node *np;
0050
0051     np = of_find_compatible_node(NULL, NULL, "fsl,imx51-m4if");
0052     if (!np)
0053         return;
0054
0055     m4if_base = of_iomap(np, 0);
0056     of_node_put(np);
0057     if (!m4if_base) {
0058         pr_err("Unable to map M4IF registers\n");
0059         return;
0060     }
0061
0062     /*
0063      * Configure VPU and IPU with higher priorities
0064      * in order to avoid artifacts during video playback
0065      */
0066     writel_relaxed(0x00000203, m4if_base + 0x40);
0067     writel_relaxed(0x00000000, m4if_base + 0x44);
0068     writel_relaxed(0x00120125, m4if_base + 0x9c);
0069     writel_relaxed(0x001901A3, m4if_base + 0x48);
0070     iounmap(m4if_base);
0071 }
0072
0073 static void __init imx51_dt_init(void)
0074 {
0075     imx51_ipu_mipi_setup();
0076     imx_src_init();
0077     imx51_m4if_setup();
0078     imx5_pmu_init();
0079     imx_aips_allow_unprivileged_access("fsl,imx51-aipstz");
0080 }
0081
0082 static void __init imx51_init_late(void)
0083 {
0084     mx51_neon_fixup();
0085     imx51_pm_init();
0086 }
0087
0088 static const char * const imx51_dt_board_compat[] __initconst = {
0089     "fsl,imx51",
0090     NULL
0091 };
0092
0093 DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
0094     .init_early = imx51_init_early,
0095     .init_machine   = imx51_dt_init,
0096     .init_late  = imx51_init_late,
0097     .dt_compat  = imx51_dt_board_compat,
0098 MACHINE_END