arm/mach-imx/cpu-imx27.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
0004  * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
0005  */
0006
0007 /*
0008  * i.MX27 specific CPU detection code
0009  */
0010
0011 #include <linux/io.h>
0012 #include <linux/of_address.h>
0013 #include <linux/module.h>
0014
0015 #include "hardware.h"
0016
0017 static int mx27_cpu_rev = -1;
0018 static int mx27_cpu_partnumber;
0019
0020 #define SYS_CHIP_ID             0x00    /* The offset of CHIP ID register */
0021 #define SYSCTRL_OFFSET      0x800   /* Offset from CCM base address */
0022
0023 static int mx27_read_cpu_rev(void)
0024 {
0025     void __iomem *ccm_base;
0026     struct device_node *np;
0027     u32 val;
0028
0029     np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
0030     ccm_base = of_iomap(np, 0);
0031     BUG_ON(!ccm_base);
0032     /*
0033      * now we have access to the IO registers. As we need
0034      * the silicon revision very early we read it here to
0035      * avoid any further hooks
0036     */
0037     val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
0038
0039     mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
0040
0041     switch (val >> 28) {
0042     case 0:
0043         return IMX_CHIP_REVISION_1_0;
0044     case 1:
0045         return IMX_CHIP_REVISION_2_0;
0046     case 2:
0047         return IMX_CHIP_REVISION_2_1;
0048     default:
0049         return IMX_CHIP_REVISION_UNKNOWN;
0050     }
0051 }
0052
0053 /*
0054  * Returns:
0055  *  the silicon revision of the cpu
0056  *  -EINVAL - not a mx27
0057  */
0058 int mx27_revision(void)
0059 {
0060     if (mx27_cpu_rev == -1)
0061         mx27_cpu_rev = mx27_read_cpu_rev();
0062
0063     if (mx27_cpu_partnumber != 0x8821)
0064         return -EINVAL;
0065
0066     return mx27_cpu_rev;
0067 }
0068 EXPORT_SYMBOL(mx27_revision);