arm/mach-footbridge/common.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/mach-footbridge/common.c
0004  *
0005  *  Copyright (C) 1998-2000 Russell King, Dave Gilbert.
0006  */
0007 #include <linux/module.h>
0008 #include <linux/types.h>
0009 #include <linux/mm.h>
0010 #include <linux/ioport.h>
0011 #include <linux/list.h>
0012 #include <linux/init.h>
0013 #include <linux/io.h>
0014 #include <linux/spinlock.h>
0015 #include <linux/dma-direct.h>
0016 #include <video/vga.h>
0017
0018 #include <asm/page.h>
0019 #include <asm/irq.h>
0020 #include <asm/mach-types.h>
0021 #include <asm/setup.h>
0022 #include <asm/system_misc.h>
0023 #include <asm/hardware/dec21285.h>
0024
0025 #include <asm/mach/irq.h>
0026 #include <asm/mach/map.h>
0027 #include <asm/mach/pci.h>
0028
0029 #include "common.h"
0030
0031 #include <mach/hardware.h>
0032 #include <mach/irqs.h>
0033 #include <asm/hardware/dec21285.h>
0034
0035 static int dc21285_get_irq(void)
0036 {
0037     void __iomem *irqstatus = (void __iomem *)CSR_IRQ_STATUS;
0038     u32 mask = readl(irqstatus);
0039
0040     if (mask & IRQ_MASK_SDRAMPARITY)
0041         return IRQ_SDRAMPARITY;
0042
0043     if (mask & IRQ_MASK_UART_RX)
0044         return IRQ_CONRX;
0045
0046     if (mask & IRQ_MASK_DMA1)
0047         return IRQ_DMA1;
0048
0049     if (mask & IRQ_MASK_DMA2)
0050         return IRQ_DMA2;
0051
0052     if (mask & IRQ_MASK_IN0)
0053         return IRQ_IN0;
0054
0055     if (mask & IRQ_MASK_IN1)
0056         return IRQ_IN1;
0057
0058     if (mask & IRQ_MASK_IN2)
0059         return IRQ_IN2;
0060
0061     if (mask & IRQ_MASK_IN3)
0062         return IRQ_IN3;
0063
0064     if (mask & IRQ_MASK_PCI)
0065         return IRQ_PCI;
0066
0067     if (mask & IRQ_MASK_DOORBELLHOST)
0068         return IRQ_DOORBELLHOST;
0069
0070     if (mask & IRQ_MASK_I2OINPOST)
0071         return IRQ_I2OINPOST;
0072
0073     if (mask & IRQ_MASK_TIMER1)
0074         return IRQ_TIMER1;
0075
0076     if (mask & IRQ_MASK_TIMER2)
0077         return IRQ_TIMER2;
0078
0079     if (mask & IRQ_MASK_TIMER3)
0080         return IRQ_TIMER3;
0081
0082     if (mask & IRQ_MASK_UART_TX)
0083         return IRQ_CONTX;
0084
0085     if (mask & IRQ_MASK_PCI_ABORT)
0086         return IRQ_PCI_ABORT;
0087
0088     if (mask & IRQ_MASK_PCI_SERR)
0089         return IRQ_PCI_SERR;
0090
0091     if (mask & IRQ_MASK_DISCARD_TIMER)
0092         return IRQ_DISCARD_TIMER;
0093
0094     if (mask & IRQ_MASK_PCI_DPERR)
0095         return IRQ_PCI_DPERR;
0096
0097     if (mask & IRQ_MASK_PCI_PERR)
0098         return IRQ_PCI_PERR;
0099
0100     return 0;
0101 }
0102
0103 static void dc21285_handle_irq(struct pt_regs *regs)
0104 {
0105     int irq;
0106     do {
0107         irq = dc21285_get_irq();
0108         if (!irq)
0109             break;
0110
0111         generic_handle_irq(irq);
0112     } while (1);
0113 }
0114
0115
0116 unsigned int mem_fclk_21285 = 50000000;
0117
0118 EXPORT_SYMBOL(mem_fclk_21285);
0119
0120 static int __init early_fclk(char *arg)
0121 {
0122     mem_fclk_21285 = simple_strtoul(arg, NULL, 0);
0123     return 0;
0124 }
0125
0126 early_param("mem_fclk_21285", early_fclk);
0127
0128 static int __init parse_tag_memclk(const struct tag *tag)
0129 {
0130     mem_fclk_21285 = tag->u.memclk.fmemclk;
0131     return 0;
0132 }
0133
0134 __tagtable(ATAG_MEMCLK, parse_tag_memclk);
0135
0136 /*
0137  * Footbridge IRQ translation table
0138  *  Converts from our IRQ numbers into FootBridge masks
0139  */
0140 static const int fb_irq_mask[] = {
0141     IRQ_MASK_UART_RX,   /*  0 */
0142     IRQ_MASK_UART_TX,   /*  1 */
0143     IRQ_MASK_TIMER1,    /*  2 */
0144     IRQ_MASK_TIMER2,    /*  3 */
0145     IRQ_MASK_TIMER3,    /*  4 */
0146     IRQ_MASK_IN0,       /*  5 */
0147     IRQ_MASK_IN1,       /*  6 */
0148     IRQ_MASK_IN2,       /*  7 */
0149     IRQ_MASK_IN3,       /*  8 */
0150     IRQ_MASK_DOORBELLHOST,  /*  9 */
0151     IRQ_MASK_DMA1,      /* 10 */
0152     IRQ_MASK_DMA2,      /* 11 */
0153     IRQ_MASK_PCI,       /* 12 */
0154     IRQ_MASK_SDRAMPARITY,   /* 13 */
0155     IRQ_MASK_I2OINPOST, /* 14 */
0156     IRQ_MASK_PCI_ABORT, /* 15 */
0157     IRQ_MASK_PCI_SERR,  /* 16 */
0158     IRQ_MASK_DISCARD_TIMER, /* 17 */
0159     IRQ_MASK_PCI_DPERR, /* 18 */
0160     IRQ_MASK_PCI_PERR,  /* 19 */
0161 };
0162
0163 static void fb_mask_irq(struct irq_data *d)
0164 {
0165     *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(d->irq)];
0166 }
0167
0168 static void fb_unmask_irq(struct irq_data *d)
0169 {
0170     *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(d->irq)];
0171 }
0172
0173 static struct irq_chip fb_chip = {
0174     .irq_ack    = fb_mask_irq,
0175     .irq_mask   = fb_mask_irq,
0176     .irq_unmask = fb_unmask_irq,
0177 };
0178
0179 static void __init __fb_init_irq(void)
0180 {
0181     unsigned int irq;
0182
0183     /*
0184      * setup DC21285 IRQs
0185      */
0186     *CSR_IRQ_DISABLE = -1;
0187     *CSR_FIQ_DISABLE = -1;
0188
0189     for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
0190         irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq);
0191         irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
0192     }
0193 }
0194
0195 void __init footbridge_init_irq(void)
0196 {
0197     set_handle_irq(dc21285_handle_irq);
0198
0199     __fb_init_irq();
0200
0201     if (!footbridge_cfn_mode())
0202         return;
0203
0204     if (machine_is_ebsa285())
0205         /* The following is dependent on which slot
0206          * you plug the Southbridge card into.  We
0207          * currently assume that you plug it into
0208          * the right-hand most slot.
0209          */
0210         isa_init_irq(IRQ_PCI);
0211
0212     if (machine_is_cats())
0213         isa_init_irq(IRQ_IN2);
0214
0215     if (machine_is_netwinder())
0216         isa_init_irq(IRQ_IN3);
0217 }
0218
0219 /*
0220  * Common mapping for all systems.  Note that the outbound write flush is
0221  * commented out since there is a "No Fix" problem with it.  Not mapping
0222  * it means that we have extra bullet protection on our feet.
0223  */
0224 static struct map_desc fb_common_io_desc[] __initdata = {
0225     {
0226         .virtual    = ARMCSR_BASE,
0227         .pfn        = __phys_to_pfn(DC21285_ARMCSR_BASE),
0228         .length     = ARMCSR_SIZE,
0229         .type       = MT_DEVICE,
0230     }
0231 };
0232
0233 /*
0234  * The mapping when the footbridge is in host mode.  We don't map any of
0235  * this when we are in add-in mode.
0236  */
0237 static struct map_desc ebsa285_host_io_desc[] __initdata = {
0238 #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
0239     {
0240         .virtual    = PCIMEM_BASE,
0241         .pfn        = __phys_to_pfn(DC21285_PCI_MEM),
0242         .length     = PCIMEM_SIZE,
0243         .type       = MT_DEVICE,
0244     }, {
0245         .virtual    = PCICFG0_BASE,
0246         .pfn        = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
0247         .length     = PCICFG0_SIZE,
0248         .type       = MT_DEVICE,
0249     }, {
0250         .virtual    = PCICFG1_BASE,
0251         .pfn        = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
0252         .length     = PCICFG1_SIZE,
0253         .type       = MT_DEVICE,
0254     }, {
0255         .virtual    = PCIIACK_BASE,
0256         .pfn        = __phys_to_pfn(DC21285_PCI_IACK),
0257         .length     = PCIIACK_SIZE,
0258         .type       = MT_DEVICE,
0259     },
0260 #endif
0261 };
0262
0263 void __init footbridge_map_io(void)
0264 {
0265     /*
0266      * Set up the common mapping first; we need this to
0267      * determine whether we're in host mode or not.
0268      */
0269     iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
0270
0271     /*
0272      * Now, work out what we've got to map in addition on this
0273      * platform.
0274      */
0275     if (footbridge_cfn_mode()) {
0276         iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
0277         pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO));
0278     }
0279
0280     vga_base = PCIMEM_BASE;
0281 }
0282
0283 void footbridge_restart(enum reboot_mode mode, const char *cmd)
0284 {
0285     if (mode == REBOOT_SOFT) {
0286         /* Jump into the ROM */
0287         soft_restart(0x41000000);
0288     } else {
0289         /*
0290          * Force the watchdog to do a CPU reset.
0291          *
0292          * After making sure that the watchdog is disabled
0293          * (so we can change the timer registers) we first
0294          * enable the timer to autoreload itself.  Next, the
0295          * timer interval is set really short and any
0296          * current interrupt request is cleared (so we can
0297          * see an edge transition).  Finally, TIMER4 is
0298          * enabled as the watchdog.
0299          */
0300         *CSR_SA110_CNTL &= ~(1 << 13);
0301         *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
0302                    TIMER_CNTL_AUTORELOAD |
0303                    TIMER_CNTL_DIV16;
0304         *CSR_TIMER4_LOAD = 0x2;
0305         *CSR_TIMER4_CLR  = 0;
0306         *CSR_SA110_CNTL |= (1 << 13);
0307     }
0308 }
0309
0310 #ifdef CONFIG_FOOTBRIDGE_ADDIN
0311
0312 static inline unsigned long fb_bus_sdram_offset(void)
0313 {
0314     return *CSR_PCISDRAMBASE & 0xfffffff0;
0315 }
0316
0317 /*
0318  * These two functions convert virtual addresses to PCI addresses and PCI
0319  * addresses to virtual addresses.  Note that it is only legal to use these
0320  * on memory obtained via get_zeroed_page or kmalloc.
0321  */
0322 unsigned long __virt_to_bus(unsigned long res)
0323 {
0324     WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
0325
0326     return res + (fb_bus_sdram_offset() - PAGE_OFFSET);
0327 }
0328 EXPORT_SYMBOL(__virt_to_bus);
0329
0330 unsigned long __bus_to_virt(unsigned long res)
0331 {
0332     res = res - (fb_bus_sdram_offset() - PAGE_OFFSET);
0333
0334     WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
0335
0336     return res;
0337 }
0338 EXPORT_SYMBOL(__bus_to_virt);
0339 #else
0340 static inline unsigned long fb_bus_sdram_offset(void)
0341 {
0342     return BUS_OFFSET;
0343 }
0344 #endif /* CONFIG_FOOTBRIDGE_ADDIN */
0345
0346 dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
0347 {
0348     return paddr + (fb_bus_sdram_offset() - PHYS_OFFSET);
0349 }
0350
0351 phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
0352 {
0353     return dev_addr - (fb_bus_sdram_offset() - PHYS_OFFSET);
0354 }