arm/mach-exynos/smc.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  *  Copyright (c) 2012 Samsung Electronics.
0004  *
0005  * Exynos - SMC Call
0006  */
0007
0008 #ifndef __ASM_ARCH_EXYNOS_SMC_H
0009 #define __ASM_ARCH_EXYNOS_SMC_H
0010
0011 #define SMC_CMD_INIT        (-1)
0012 #define SMC_CMD_INFO        (-2)
0013 /* For Power Management */
0014 #define SMC_CMD_SLEEP       (-3)
0015 #define SMC_CMD_CPU1BOOT    (-4)
0016 #define SMC_CMD_CPU0AFTR    (-5)
0017 #define SMC_CMD_SAVE        (-6)
0018 #define SMC_CMD_SHUTDOWN    (-7)
0019 /* For CP15 Access */
0020 #define SMC_CMD_C15RESUME   (-11)
0021 /* For L2 Cache Access */
0022 #define SMC_CMD_L2X0CTRL    (-21)
0023 #define SMC_CMD_L2X0SETUP1  (-22)
0024 #define SMC_CMD_L2X0SETUP2  (-23)
0025 #define SMC_CMD_L2X0INVALL  (-24)
0026 #define SMC_CMD_L2X0DEBUG   (-25)
0027
0028 /* For Accessing CP15/SFR (General) */
0029 #define SMC_CMD_REG     (-101)
0030
0031 /* defines for SMC_CMD_REG */
0032 #define SMC_REG_CLASS_SFR_W (0x1 << 30)
0033 #define SMC_REG_ID_SFR_W(addr)  (SMC_REG_CLASS_SFR_W | ((addr) >> 2))
0034
0035 #ifndef __ASSEMBLY__
0036
0037 extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
0038
0039 #endif /* __ASSEMBLY__ */
0040
0041 /* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
0042 #define OP_TYPE_CORE        0x0
0043 #define OP_TYPE_CLUSTER     0x1
0044
0045 /* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
0046 #define SMC_POWERSTATE_IDLE 0x1
0047
0048 #endif