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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 /* 0003 * Cloned from linux/arch/arm/mach-realview/headsmp.S 0004 * 0005 * Copyright (c) 2003 ARM Limited 0006 * All Rights Reserved 0007 */ 0008 #include <linux/linkage.h> 0009 #include <linux/init.h> 0010 0011 #include <asm/assembler.h> 0012 0013 /* 0014 * exynos4 specific entry point for secondary CPUs. This provides 0015 * a "holding pen" into which all secondary cores are held until we're 0016 * ready for them to initialise. 0017 */ 0018 ENTRY(exynos4_secondary_startup) 0019 ARM_BE8(setend be) 0020 mrc p15, 0, r0, c0, c0, 5 0021 and r0, r0, #15 0022 adr r4, 1f 0023 ldmia r4, {r5, r6} 0024 sub r4, r4, r5 0025 add r6, r6, r4 0026 pen: ldr r7, [r6] 0027 cmp r7, r0 0028 bne pen 0029 0030 /* 0031 * we've been released from the holding pen: secondary_stack 0032 * should now contain the SVC stack for this core 0033 */ 0034 b secondary_startup 0035 ENDPROC(exynos4_secondary_startup) 0036 0037 .align 2 0038 1: .long . 0039 .long exynos_pen_release
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