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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * arch/arm/mach-ep93xx/ts72xx.c
0004  * Technologic Systems TS72xx SBC support.
0005  *
0006  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
0007  */
0008 
0009 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0010 
0011 #include <linux/kernel.h>
0012 #include <linux/init.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/io.h>
0015 #include <linux/mtd/platnand.h>
0016 #include <linux/spi/spi.h>
0017 #include <linux/spi/flash.h>
0018 #include <linux/spi/mmc_spi.h>
0019 #include <linux/mmc/host.h>
0020 #include <linux/platform_data/spi-ep93xx.h>
0021 #include <linux/gpio/machine.h>
0022 
0023 #include "gpio-ep93xx.h"
0024 #include "hardware.h"
0025 
0026 #include <asm/mach-types.h>
0027 #include <asm/mach/map.h>
0028 #include <asm/mach/arch.h>
0029 
0030 #include "soc.h"
0031 #include "ts72xx.h"
0032 
0033 /*************************************************************************
0034  * IO map
0035  *************************************************************************/
0036 static struct map_desc ts72xx_io_desc[] __initdata = {
0037     {
0038         .virtual    = (unsigned long)TS72XX_MODEL_VIRT_BASE,
0039         .pfn        = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
0040         .length     = TS72XX_MODEL_SIZE,
0041         .type       = MT_DEVICE,
0042     }, {
0043         .virtual    = (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
0044         .pfn        = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
0045         .length     = TS72XX_OPTIONS_SIZE,
0046         .type       = MT_DEVICE,
0047     }, {
0048         .virtual    = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
0049         .pfn        = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
0050         .length     = TS72XX_OPTIONS2_SIZE,
0051         .type       = MT_DEVICE,
0052     }, {
0053         .virtual    = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
0054         .pfn        = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
0055         .length     = TS72XX_CPLDVER_SIZE,
0056         .type       = MT_DEVICE,
0057     }
0058 };
0059 
0060 static void __init ts72xx_map_io(void)
0061 {
0062     ep93xx_map_io();
0063     iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
0064 }
0065 
0066 
0067 /*************************************************************************
0068  * NAND flash
0069  *************************************************************************/
0070 #define TS72XX_NAND_CONTROL_ADDR_LINE   22  /* 0xN0400000 */
0071 #define TS72XX_NAND_BUSY_ADDR_LINE  23  /* 0xN0800000 */
0072 
0073 static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
0074                   int cmd, unsigned int ctrl)
0075 {
0076     if (ctrl & NAND_CTRL_CHANGE) {
0077         void __iomem *addr = chip->legacy.IO_ADDR_R;
0078         unsigned char bits;
0079 
0080         addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
0081 
0082         bits = __raw_readb(addr) & ~0x07;
0083         bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
0084         bits |= (ctrl & NAND_CLE);  /* bit 1 -> bit 1 */
0085         bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
0086 
0087         __raw_writeb(bits, addr);
0088     }
0089 
0090     if (cmd != NAND_CMD_NONE)
0091         __raw_writeb(cmd, chip->legacy.IO_ADDR_W);
0092 }
0093 
0094 static int ts72xx_nand_device_ready(struct nand_chip *chip)
0095 {
0096     void __iomem *addr = chip->legacy.IO_ADDR_R;
0097 
0098     addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
0099 
0100     return !!(__raw_readb(addr) & 0x20);
0101 }
0102 
0103 #define TS72XX_BOOTROM_PART_SIZE    (SZ_16K)
0104 #define TS72XX_REDBOOT_PART_SIZE    (SZ_2M + SZ_1M)
0105 
0106 static struct mtd_partition ts72xx_nand_parts[] = {
0107     {
0108         .name       = "TS-BOOTROM",
0109         .offset     = 0,
0110         .size       = TS72XX_BOOTROM_PART_SIZE,
0111         .mask_flags = MTD_WRITEABLE,    /* force read-only */
0112     }, {
0113         .name       = "Linux",
0114         .offset     = MTDPART_OFS_RETAIN,
0115         .size       = TS72XX_REDBOOT_PART_SIZE,
0116                 /* leave so much for last partition */
0117     }, {
0118         .name       = "RedBoot",
0119         .offset     = MTDPART_OFS_APPEND,
0120         .size       = MTDPART_SIZ_FULL,
0121         .mask_flags = MTD_WRITEABLE,    /* force read-only */
0122     },
0123 };
0124 
0125 static struct platform_nand_data ts72xx_nand_data = {
0126     .chip = {
0127         .nr_chips   = 1,
0128         .chip_offset    = 0,
0129         .chip_delay = 15,
0130     },
0131     .ctrl = {
0132         .cmd_ctrl   = ts72xx_nand_hwcontrol,
0133         .dev_ready  = ts72xx_nand_device_ready,
0134     },
0135 };
0136 
0137 static struct resource ts72xx_nand_resource[] = {
0138     {
0139         .start      = 0,            /* filled in later */
0140         .end        = 0,            /* filled in later */
0141         .flags      = IORESOURCE_MEM,
0142     },
0143 };
0144 
0145 static struct platform_device ts72xx_nand_flash = {
0146     .name           = "gen_nand",
0147     .id         = -1,
0148     .dev.platform_data  = &ts72xx_nand_data,
0149     .resource       = ts72xx_nand_resource,
0150     .num_resources      = ARRAY_SIZE(ts72xx_nand_resource),
0151 };
0152 
0153 static void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
0154                   resource_size_t start)
0155 {
0156     /*
0157      * TS7200 has NOR flash all other TS72xx board have NAND flash.
0158      */
0159     if (board_is_ts7200()) {
0160         ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
0161     } else {
0162         ts72xx_nand_resource[0].start = start;
0163         ts72xx_nand_resource[0].end = start + SZ_16M - 1;
0164 
0165         ts72xx_nand_data.chip.partitions = parts;
0166         ts72xx_nand_data.chip.nr_partitions = n;
0167 
0168         platform_device_register(&ts72xx_nand_flash);
0169     }
0170 }
0171 
0172 /*************************************************************************
0173  * RTC M48T86
0174  *************************************************************************/
0175 #define TS72XX_RTC_INDEX_PHYS_BASE  (EP93XX_CS1_PHYS_BASE + 0x00800000)
0176 #define TS72XX_RTC_DATA_PHYS_BASE   (EP93XX_CS1_PHYS_BASE + 0x01700000)
0177 
0178 static struct resource ts72xx_rtc_resources[] = {
0179     DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
0180     DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
0181 };
0182 
0183 static struct platform_device ts72xx_rtc_device = {
0184     .name       = "rtc-m48t86",
0185     .id     = -1,
0186     .resource   = ts72xx_rtc_resources,
0187     .num_resources  = ARRAY_SIZE(ts72xx_rtc_resources),
0188 };
0189 
0190 /*************************************************************************
0191  * Watchdog (in CPLD)
0192  *************************************************************************/
0193 #define TS72XX_WDT_CONTROL_PHYS_BASE    (EP93XX_CS2_PHYS_BASE + 0x03800000)
0194 #define TS72XX_WDT_FEED_PHYS_BASE   (EP93XX_CS2_PHYS_BASE + 0x03c00000)
0195 
0196 static struct resource ts72xx_wdt_resources[] = {
0197     DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
0198     DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
0199 };
0200 
0201 static struct platform_device ts72xx_wdt_device = {
0202     .name       = "ts72xx-wdt",
0203     .id     = -1,
0204     .resource   = ts72xx_wdt_resources,
0205     .num_resources  = ARRAY_SIZE(ts72xx_wdt_resources),
0206 };
0207 
0208 /*************************************************************************
0209  * ETH
0210  *************************************************************************/
0211 static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
0212     .phy_id     = 1,
0213 };
0214 
0215 /*************************************************************************
0216  * SPI SD/MMC host
0217  *************************************************************************/
0218 #define BK3_EN_SDCARD_PHYS_BASE         0x12400000
0219 #define BK3_EN_SDCARD_PWR 0x0
0220 #define BK3_DIS_SDCARD_PWR 0x0C
0221 static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
0222 {
0223     void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
0224 
0225     if (!pwr_sd) {
0226         pr_err("Failed to enable SD card power!");
0227         return;
0228     }
0229 
0230     pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
0231          !!vdd ? "ON" : "OFF", vdd);
0232 
0233     if (!!vdd)
0234         __raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
0235     else
0236         __raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
0237 
0238     iounmap(pwr_sd);
0239 }
0240 
0241 static struct mmc_spi_platform_data bk3_spi_mmc_data = {
0242     .detect_delay   = 500,
0243     .powerup_msecs  = 100,
0244     .ocr_mask   = MMC_VDD_32_33 | MMC_VDD_33_34,
0245     .caps       = MMC_CAP_NONREMOVABLE,
0246     .setpower       = bk3_mmc_spi_setpower,
0247 };
0248 
0249 /*************************************************************************
0250  * SPI Bus - SD card access
0251  *************************************************************************/
0252 static struct spi_board_info bk3_spi_board_info[] __initdata = {
0253     {
0254         .modalias       = "mmc_spi",
0255         .platform_data      = &bk3_spi_mmc_data,
0256         .max_speed_hz       = 7.4E6,
0257         .bus_num        = 0,
0258         .chip_select        = 0,
0259         .mode           = SPI_MODE_0,
0260     },
0261 };
0262 
0263 /*
0264  * This is a stub -> the FGPIO[3] pin is not connected on the schematic
0265  * The all work is performed automatically by !SPI_FRAME (SFRM1) and
0266  * goes through CPLD
0267  */
0268 static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
0269     .dev_id = "spi0",
0270     .table = {
0271         GPIO_LOOKUP("F", 3, "cs", GPIO_ACTIVE_LOW),
0272         { },
0273     },
0274 };
0275 
0276 static struct ep93xx_spi_info bk3_spi_master __initdata = {
0277     .use_dma    = 1,
0278 };
0279 
0280 /*************************************************************************
0281  * TS72XX support code
0282  *************************************************************************/
0283 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
0284 
0285 /* Relative to EP93XX_CS1_PHYS_BASE */
0286 #define TS73XX_FPGA_LOADER_BASE     0x03c00000
0287 
0288 static struct resource ts73xx_fpga_resources[] = {
0289     {
0290         .start  = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
0291         .end    = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
0292         .flags  = IORESOURCE_MEM,
0293     },
0294 };
0295 
0296 static struct platform_device ts73xx_fpga_device = {
0297     .name   = "ts73xx-fpga-mgr",
0298     .id = -1,
0299     .resource = ts73xx_fpga_resources,
0300     .num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
0301 };
0302 
0303 #endif
0304 
0305 /*************************************************************************
0306  * SPI Bus
0307  *************************************************************************/
0308 static struct spi_board_info ts72xx_spi_devices[] __initdata = {
0309     {
0310         .modalias       = "tmp122",
0311         .max_speed_hz       = 2 * 1000 * 1000,
0312         .bus_num        = 0,
0313         .chip_select        = 0,
0314     },
0315 };
0316 
0317 static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
0318     .dev_id = "spi0",
0319     .table = {
0320         /* DIO_17 */
0321         GPIO_LOOKUP("F", 2, "cs", GPIO_ACTIVE_LOW),
0322         { },
0323     },
0324 };
0325 
0326 static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
0327     /* Intentionally left blank */
0328 };
0329 
0330 static void __init ts72xx_init_machine(void)
0331 {
0332     ep93xx_init_devices();
0333     ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
0334                   is_ts9420_installed() ?
0335                   EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
0336     platform_device_register(&ts72xx_rtc_device);
0337     platform_device_register(&ts72xx_wdt_device);
0338 
0339     ep93xx_register_eth(&ts72xx_eth_data, 1);
0340 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
0341     if (board_is_ts7300())
0342         platform_device_register(&ts73xx_fpga_device);
0343 #endif
0344     gpiod_add_lookup_table(&ts72xx_spi_cs_gpio_table);
0345     ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
0346                 ARRAY_SIZE(ts72xx_spi_devices));
0347 }
0348 
0349 MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
0350     /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
0351     .atag_offset    = 0x100,
0352     .nr_irqs    = NR_EP93XX_IRQS,
0353     .map_io     = ts72xx_map_io,
0354     .init_irq   = ep93xx_init_irq,
0355     .init_time  = ep93xx_timer_init,
0356     .init_machine   = ts72xx_init_machine,
0357     .restart    = ep93xx_restart,
0358 MACHINE_END
0359 
0360 /*************************************************************************
0361  * EP93xx I2S audio peripheral handling
0362  *************************************************************************/
0363 static struct resource ep93xx_i2s_resource[] = {
0364     DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
0365     DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
0366 };
0367 
0368 static struct platform_device ep93xx_i2s_device = {
0369     .name       = "ep93xx-spilink-i2s",
0370     .id     = -1,
0371     .num_resources  = ARRAY_SIZE(ep93xx_i2s_resource),
0372     .resource   = ep93xx_i2s_resource,
0373 };
0374 
0375 /*************************************************************************
0376  * BK3 support code
0377  *************************************************************************/
0378 static struct mtd_partition bk3_nand_parts[] = {
0379     {
0380         .name       = "System",
0381         .offset = 0x00000000,
0382         .size       = 0x01e00000,
0383     }, {
0384         .name       = "Data",
0385         .offset = 0x01e00000,
0386         .size       = 0x05f20000
0387     }, {
0388         .name       = "RedBoot",
0389         .offset = 0x07d20000,
0390         .size       = 0x002e0000,
0391         .mask_flags = MTD_WRITEABLE,    /* force RO */
0392     },
0393 };
0394 
0395 static void __init bk3_init_machine(void)
0396 {
0397     ep93xx_init_devices();
0398 
0399     ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
0400                   EP93XX_CS6_PHYS_BASE);
0401 
0402     ep93xx_register_eth(&ts72xx_eth_data, 1);
0403 
0404     gpiod_add_lookup_table(&bk3_spi_cs_gpio_table);
0405     ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
0406                 ARRAY_SIZE(bk3_spi_board_info));
0407 
0408     /* Configure ep93xx's I2S to use AC97 pins */
0409     ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
0410     platform_device_register(&ep93xx_i2s_device);
0411 }
0412 
0413 MACHINE_START(BK3, "Liebherr controller BK3.1")
0414     /* Maintainer: Lukasz Majewski <lukma@denx.de> */
0415     .atag_offset    = 0x100,
0416     .nr_irqs    = NR_EP93XX_IRQS,
0417     .map_io     = ts72xx_map_io,
0418     .init_irq   = ep93xx_init_irq,
0419     .init_time  = ep93xx_timer_init,
0420     .init_machine   = bk3_init_machine,
0421     .restart    = ep93xx_restart,
0422 MACHINE_END
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