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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * arch/arm/mach-ep93xx/include/mach/hardware.h
0004  */
0005 
0006 #ifndef __ASM_ARCH_HARDWARE_H
0007 #define __ASM_ARCH_HARDWARE_H
0008 
0009 #include "platform.h"
0010 
0011 /*
0012  * The EP93xx has two external crystal oscillators.  To generate the
0013  * required high-frequency clocks, the processor uses two phase-locked-
0014  * loops (PLLs) to multiply the incoming external clock signal to much
0015  * higher frequencies that are then divided down by programmable dividers
0016  * to produce the needed clocks.  The PLLs operate independently of one
0017  * another.
0018  */
0019 #define EP93XX_EXT_CLK_RATE 14745600
0020 #define EP93XX_EXT_RTC_RATE 32768
0021 
0022 #define EP93XX_KEYTCHCLK_DIV4   (EP93XX_EXT_CLK_RATE / 4)
0023 #define EP93XX_KEYTCHCLK_DIV16  (EP93XX_EXT_CLK_RATE / 16)
0024 
0025 #endif