arm/mach-alpine/alpine_cpu_pm.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Low-level power-management support for Alpine platform.
0004  *
0005  * Copyright (C) 2015 Annapurna Labs Ltd.
0006  */
0007
0008 #include <linux/io.h>
0009 #include <linux/of.h>
0010 #include <linux/of_address.h>
0011 #include <linux/regmap.h>
0012 #include <linux/mfd/syscon.h>
0013
0014 #include "alpine_cpu_pm.h"
0015 #include "alpine_cpu_resume.h"
0016
0017 /* NB registers */
0018 #define AL_SYSFAB_POWER_CONTROL(cpu)    (0x2000 + (cpu)*0x100 + 0x20)
0019
0020 static struct regmap *al_sysfabric;
0021 static struct al_cpu_resume_regs __iomem *al_cpu_resume_regs;
0022 static int wakeup_supported;
0023
0024 int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr)
0025 {
0026     if (!wakeup_supported)
0027         return -ENOSYS;
0028
0029     /*
0030      * Set CPU resume address -
0031      * secure firmware running on boot will jump to this address
0032      * after setting proper CPU mode, and initialiing e.g. secure
0033      * regs (the same mode all CPUs are booted to - usually HYP)
0034      */
0035     writel(phys_resume_addr,
0036            &al_cpu_resume_regs->per_cpu[phys_cpu].resume_addr);
0037
0038     /* Power-up the CPU */
0039     regmap_write(al_sysfabric, AL_SYSFAB_POWER_CONTROL(phys_cpu), 0);
0040
0041     return 0;
0042 }
0043
0044 void __init alpine_cpu_pm_init(void)
0045 {
0046     struct device_node *np;
0047     uint32_t watermark;
0048
0049     al_sysfabric = syscon_regmap_lookup_by_compatible("al,alpine-sysfabric-service");
0050
0051     np = of_find_compatible_node(NULL, NULL, "al,alpine-cpu-resume");
0052     al_cpu_resume_regs = of_iomap(np, 0);
0053
0054     wakeup_supported = !IS_ERR(al_sysfabric) && al_cpu_resume_regs;
0055
0056     if (wakeup_supported) {
0057         watermark = readl(&al_cpu_resume_regs->watermark);
0058         wakeup_supported = (watermark & AL_CPU_RESUME_MAGIC_NUM_MASK)
0059                     == AL_CPU_RESUME_MAGIC_NUM;
0060     }
0061 }