arm/lib/io-writesw-armv3.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  linux/arch/arm/lib/io-writesw-armv3.S
0004  *
0005  *  Copyright (C) 1995-2000 Russell King
0006  */
0007 #include <linux/linkage.h>
0008 #include <asm/assembler.h>
0009
0010 .Loutsw_bad_alignment:
0011         adr r0, .Loutsw_bad_align_msg
0012         mov r2, lr
0013         b   panic
0014 .Loutsw_bad_align_msg:
0015         .asciz  "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
0016         .align
0017
0018 .Loutsw_align:  tst r1, #1
0019         bne .Loutsw_bad_alignment
0020
0021         add r1, r1, #2
0022
0023         ldr r3, [r1, #-4]
0024         mov r3, r3, lsr #16
0025         orr r3, r3, r3, lsl #16
0026         str r3, [r0]
0027         subs    r2, r2, #1
0028         reteq   lr
0029
0030 ENTRY(__raw_writesw)
0031         teq r2, #0      @ do we have to check for the zero len?
0032         reteq   lr
0033         tst r1, #3
0034         bne .Loutsw_align
0035
0036         stmfd   sp!, {r4, r5, r6, lr}
0037
0038         subs    r2, r2, #8
0039         bmi .Lno_outsw_8
0040
0041 .Loutsw_8_lp:   ldmia   r1!, {r3, r4, r5, r6}
0042
0043         mov ip, r3, lsl #16
0044         orr ip, ip, ip, lsr #16
0045         str ip, [r0]
0046
0047         mov ip, r3, lsr #16
0048         orr ip, ip, ip, lsl #16
0049         str ip, [r0]
0050
0051         mov ip, r4, lsl #16
0052         orr ip, ip, ip, lsr #16
0053         str ip, [r0]
0054
0055         mov ip, r4, lsr #16
0056         orr ip, ip, ip, lsl #16
0057         str ip, [r0]
0058
0059         mov ip, r5, lsl #16
0060         orr ip, ip, ip, lsr #16
0061         str ip, [r0]
0062
0063         mov ip, r5, lsr #16
0064         orr ip, ip, ip, lsl #16
0065         str ip, [r0]
0066
0067         mov ip, r6, lsl #16
0068         orr ip, ip, ip, lsr #16
0069         str ip, [r0]
0070
0071         mov ip, r6, lsr #16
0072         orr ip, ip, ip, lsl #16
0073         str ip, [r0]
0074
0075         subs    r2, r2, #8
0076         bpl .Loutsw_8_lp
0077
0078         tst r2, #7
0079         ldmfdeq sp!, {r4, r5, r6, pc}
0080
0081 .Lno_outsw_8:   tst r2, #4
0082         beq .Lno_outsw_4
0083
0084         ldmia   r1!, {r3, r4}
0085
0086         mov ip, r3, lsl #16
0087         orr ip, ip, ip, lsr #16
0088         str ip, [r0]
0089
0090         mov ip, r3, lsr #16
0091         orr ip, ip, ip, lsl #16
0092         str ip, [r0]
0093
0094         mov ip, r4, lsl #16
0095         orr ip, ip, ip, lsr #16
0096         str ip, [r0]
0097
0098         mov ip, r4, lsr #16
0099         orr ip, ip, ip, lsl #16
0100         str ip, [r0]
0101
0102 .Lno_outsw_4:   tst r2, #2
0103         beq .Lno_outsw_2
0104
0105         ldr r3, [r1], #4
0106
0107         mov ip, r3, lsl #16
0108         orr ip, ip, ip, lsr #16
0109         str ip, [r0]
0110
0111         mov ip, r3, lsr #16
0112         orr ip, ip, ip, lsl #16
0113         str ip, [r0]
0114
0115 .Lno_outsw_2:   tst r2, #1
0116
0117         ldrne   r3, [r1]
0118
0119         movne   ip, r3, lsl #16
0120         orrne   ip, ip, ip, lsr #16
0121         strne   ip, [r0]
0122
0123         ldmfd   sp!, {r4, r5, r6, pc}