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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* ld script to make ARM Linux kernel
0003  * taken from the i386 version by Russell King
0004  * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
0005  */
0006 
0007 /* No __ro_after_init data in the .rodata section - which will always be ro */
0008 #define RO_AFTER_INIT_DATA
0009 
0010 #include <linux/sizes.h>
0011 
0012 #include <asm/vmlinux.lds.h>
0013 #include <asm/cache.h>
0014 #include <asm/thread_info.h>
0015 #include <asm/memory.h>
0016 #include <asm/mpu.h>
0017 #include <asm/page.h>
0018 
0019 OUTPUT_ARCH(arm)
0020 ENTRY(stext)
0021 
0022 #ifndef __ARMEB__
0023 jiffies = jiffies_64;
0024 #else
0025 jiffies = jiffies_64 + 4;
0026 #endif
0027 
0028 SECTIONS
0029 {
0030     /*
0031      * XXX: The linker does not define how output sections are
0032      * assigned to input sections when there are multiple statements
0033      * matching the same input section name.  There is no documented
0034      * order of matching.
0035      *
0036      * unwind exit sections must be discarded before the rest of the
0037      * unwind sections get included.
0038      */
0039     /DISCARD/ : {
0040         ARM_DISCARD
0041         *(.alt.smp.init)
0042         *(.pv_table)
0043 #ifndef CONFIG_ARM_UNWIND
0044         *(.ARM.exidx) *(.ARM.exidx.*)
0045         *(.ARM.extab) *(.ARM.extab.*)
0046 #endif
0047     }
0048 
0049     . = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
0050     _xiprom = .;            /* XIP ROM area to be mapped */
0051 
0052     .head.text : {
0053         _text = .;
0054         HEAD_TEXT
0055     }
0056 
0057     .text : {           /* Real text segment        */
0058         _stext = .;     /* Text and read-only data  */
0059         ARM_TEXT
0060     }
0061 
0062     RO_DATA(PAGE_SIZE)
0063 
0064     . = ALIGN(4);
0065     __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
0066         __start___ex_table = .;
0067         ARM_MMU_KEEP(*(__ex_table))
0068         __stop___ex_table = .;
0069     }
0070 
0071 #ifdef CONFIG_ARM_UNWIND
0072     ARM_UNWIND_SECTIONS
0073 #endif
0074 
0075     _etext = .;         /* End of text and rodata section */
0076 
0077     ARM_VECTORS
0078     INIT_TEXT_SECTION(8)
0079     .exit.text : {
0080         ARM_EXIT_KEEP(EXIT_TEXT)
0081     }
0082     .init.proc.info : {
0083         ARM_CPU_DISCARD(PROC_INFO)
0084     }
0085     .init.arch.info : {
0086         __arch_info_begin = .;
0087         *(.arch.info.init)
0088         __arch_info_end = .;
0089     }
0090     .init.tagtable : {
0091         __tagtable_begin = .;
0092         *(.taglist.init)
0093         __tagtable_end = .;
0094     }
0095     .init.rodata : {
0096         INIT_SETUP(16)
0097         INIT_CALLS
0098         CON_INITCALL
0099         INIT_RAM_FS
0100     }
0101 
0102 #ifdef CONFIG_ARM_MPU
0103     . = ALIGN(SZ_128K);
0104 #endif
0105     _exiprom = .;           /* End of XIP ROM area */
0106 
0107 /*
0108  * From this point, stuff is considered writable and will be copied to RAM
0109  */
0110     __data_loc = ALIGN(4);      /* location in file */
0111     . = PAGE_OFFSET + TEXT_OFFSET;  /* location in memory */
0112 #undef LOAD_OFFSET
0113 #define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc)
0114 
0115     . = ALIGN(THREAD_SIZE);
0116     _sdata = .;
0117     RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
0118     .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
0119         *(.data..ro_after_init)
0120     }
0121     _edata = .;
0122 
0123     . = ALIGN(PAGE_SIZE);
0124     __init_begin = .;
0125     .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
0126         INIT_DATA
0127     }
0128     .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
0129         ARM_EXIT_KEEP(EXIT_DATA)
0130     }
0131 #ifdef CONFIG_SMP
0132     PERCPU_SECTION(L1_CACHE_BYTES)
0133 #endif
0134 
0135 #ifdef CONFIG_HAVE_TCM
0136     ARM_TCM
0137 #endif
0138 
0139     /*
0140      * End of copied data. We need a dummy section to get its LMA.
0141      * Also located before final ALIGN() as trailing padding is not stored
0142      * in the resulting binary file and useless to copy.
0143      */
0144     .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
0145     _edata_loc = LOADADDR(.data.endmark);
0146 
0147     . = ALIGN(PAGE_SIZE);
0148     __init_end = .;
0149 
0150     BSS_SECTION(0, 0, 8)
0151 #ifdef CONFIG_ARM_MPU
0152     . = ALIGN(PMSAv8_MINALIGN);
0153 #endif
0154     _end = .;
0155 
0156     STABS_DEBUG
0157     DWARF_DEBUG
0158     ARM_DETAILS
0159 
0160     ARM_ASSERTS
0161 }
0162 
0163 /*
0164  * These must never be empty
0165  * If you have to comment these two assert statements out, your
0166  * binutils is too old (for other reasons as well)
0167  */
0168 ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
0169 #ifndef CONFIG_COMPILE_TEST
0170 ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
0171 #endif
0172 
0173 #ifdef CONFIG_XIP_DEFLATED_DATA
0174 /*
0175  * The .bss is used as a stack area for __inflate_kernel_data() whose stack
0176  * frame is 9568 bytes. Make sure it has extra room left.
0177  */
0178 ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
0179 #endif
0180 
0181 #if defined(CONFIG_ARM_MPU) && !defined(CONFIG_COMPILE_TEST)
0182 /*
0183  * Due to PMSAv7 restriction on base address and size we have to
0184  * enforce minimal alignment restrictions. It was seen that weaker
0185  * alignment restriction on _xiprom will likely force XIP address
0186  * space spawns multiple MPU regions thus it is likely we run in
0187  * situation when we are reprogramming MPU region we run on with
0188  * something which doesn't cover reprogramming code itself, so as soon
0189  * as we update MPU settings we'd immediately try to execute straight
0190  * from background region which is XN.
0191  * It seem that alignment in 1M should suit most users.
0192  * _exiprom is aligned as 1/8 of 1M so can be covered by subregion
0193  * disable
0194  */
0195 ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
0196 ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
0197 #endif