arm/kernel/topology.c

0001 /*
0002  * arch/arm/kernel/topology.c
0003  *
0004  * Copyright (C) 2011 Linaro Limited.
0005  * Written by: Vincent Guittot
0006  *
0007  * based on arch/sh/kernel/topology.c
0008  *
0009  * This file is subject to the terms and conditions of the GNU General Public
0010  * License.  See the file "COPYING" in the main directory of this archive
0011  * for more details.
0012  */
0013
0014 #include <linux/arch_topology.h>
0015 #include <linux/cpu.h>
0016 #include <linux/cpufreq.h>
0017 #include <linux/cpumask.h>
0018 #include <linux/export.h>
0019 #include <linux/init.h>
0020 #include <linux/percpu.h>
0021 #include <linux/node.h>
0022 #include <linux/nodemask.h>
0023 #include <linux/of.h>
0024 #include <linux/sched.h>
0025 #include <linux/sched/topology.h>
0026 #include <linux/slab.h>
0027 #include <linux/string.h>
0028
0029 #include <asm/cpu.h>
0030 #include <asm/cputype.h>
0031 #include <asm/topology.h>
0032
0033 /*
0034  * cpu capacity scale management
0035  */
0036
0037 /*
0038  * cpu capacity table
0039  * This per cpu data structure describes the relative capacity of each core.
0040  * On a heteregenous system, cores don't have the same computation capacity
0041  * and we reflect that difference in the cpu_capacity field so the scheduler
0042  * can take this difference into account during load balance. A per cpu
0043  * structure is preferred because each CPU updates its own cpu_capacity field
0044  * during the load balance except for idle cores. One idle core is selected
0045  * to run the rebalance_domains for all idle cores and the cpu_capacity can be
0046  * updated during this sequence.
0047  */
0048
0049 #ifdef CONFIG_OF
0050 struct cpu_efficiency {
0051     const char *compatible;
0052     unsigned long efficiency;
0053 };
0054
0055 /*
0056  * Table of relative efficiency of each processors
0057  * The efficiency value must fit in 20bit and the final
0058  * cpu_scale value must be in the range
0059  *   0 < cpu_scale < 3*SCHED_CAPACITY_SCALE/2
0060  * in order to return at most 1 when DIV_ROUND_CLOSEST
0061  * is used to compute the capacity of a CPU.
0062  * Processors that are not defined in the table,
0063  * use the default SCHED_CAPACITY_SCALE value for cpu_scale.
0064  */
0065 static const struct cpu_efficiency table_efficiency[] = {
0066     {"arm,cortex-a15", 3891},
0067     {"arm,cortex-a7",  2048},
0068     {NULL, },
0069 };
0070
0071 static unsigned long *__cpu_capacity;
0072 #define cpu_capacity(cpu)   __cpu_capacity[cpu]
0073
0074 static unsigned long middle_capacity = 1;
0075 static bool cap_from_dt = true;
0076
0077 /*
0078  * Iterate all CPUs' descriptor in DT and compute the efficiency
0079  * (as per table_efficiency). Also calculate a middle efficiency
0080  * as close as possible to  (max{eff_i} - min{eff_i}) / 2
0081  * This is later used to scale the cpu_capacity field such that an
0082  * 'average' CPU is of middle capacity. Also see the comments near
0083  * table_efficiency[] and update_cpu_capacity().
0084  */
0085 static void __init parse_dt_topology(void)
0086 {
0087     const struct cpu_efficiency *cpu_eff;
0088     struct device_node *cn = NULL;
0089     unsigned long min_capacity = ULONG_MAX;
0090     unsigned long max_capacity = 0;
0091     unsigned long capacity = 0;
0092     int cpu = 0;
0093
0094     __cpu_capacity = kcalloc(nr_cpu_ids, sizeof(*__cpu_capacity),
0095                  GFP_NOWAIT);
0096
0097     for_each_possible_cpu(cpu) {
0098         const __be32 *rate;
0099         int len;
0100
0101         /* too early to use cpu->of_node */
0102         cn = of_get_cpu_node(cpu, NULL);
0103         if (!cn) {
0104             pr_err("missing device node for CPU %d\n", cpu);
0105             continue;
0106         }
0107
0108         if (topology_parse_cpu_capacity(cn, cpu)) {
0109             of_node_put(cn);
0110             continue;
0111         }
0112
0113         cap_from_dt = false;
0114
0115         for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++)
0116             if (of_device_is_compatible(cn, cpu_eff->compatible))
0117                 break;
0118
0119         if (cpu_eff->compatible == NULL)
0120             continue;
0121
0122         rate = of_get_property(cn, "clock-frequency", &len);
0123         if (!rate || len != 4) {
0124             pr_err("%pOF missing clock-frequency property\n", cn);
0125             continue;
0126         }
0127
0128         capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency;
0129
0130         /* Save min capacity of the system */
0131         if (capacity < min_capacity)
0132             min_capacity = capacity;
0133
0134         /* Save max capacity of the system */
0135         if (capacity > max_capacity)
0136             max_capacity = capacity;
0137
0138         cpu_capacity(cpu) = capacity;
0139     }
0140
0141     /* If min and max capacities are equals, we bypass the update of the
0142      * cpu_scale because all CPUs have the same capacity. Otherwise, we
0143      * compute a middle_capacity factor that will ensure that the capacity
0144      * of an 'average' CPU of the system will be as close as possible to
0145      * SCHED_CAPACITY_SCALE, which is the default value, but with the
0146      * constraint explained near table_efficiency[].
0147      */
0148     if (4*max_capacity < (3*(max_capacity + min_capacity)))
0149         middle_capacity = (min_capacity + max_capacity)
0150                 >> (SCHED_CAPACITY_SHIFT+1);
0151     else
0152         middle_capacity = ((max_capacity / 3)
0153                 >> (SCHED_CAPACITY_SHIFT-1)) + 1;
0154
0155     if (cap_from_dt)
0156         topology_normalize_cpu_scale();
0157 }
0158
0159 /*
0160  * Look for a customed capacity of a CPU in the cpu_capacity table during the
0161  * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the
0162  * function returns directly for SMP system.
0163  */
0164 static void update_cpu_capacity(unsigned int cpu)
0165 {
0166     if (!cpu_capacity(cpu) || cap_from_dt)
0167         return;
0168
0169     topology_set_cpu_scale(cpu, cpu_capacity(cpu) / middle_capacity);
0170
0171     pr_info("CPU%u: update cpu_capacity %lu\n",
0172         cpu, topology_get_cpu_scale(cpu));
0173 }
0174
0175 #else
0176 static inline void parse_dt_topology(void) {}
0177 static inline void update_cpu_capacity(unsigned int cpuid) {}
0178 #endif
0179
0180 /*
0181  * store_cpu_topology is called at boot when only one cpu is running
0182  * and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
0183  * which prevents simultaneous write access to cpu_topology array
0184  */
0185 void store_cpu_topology(unsigned int cpuid)
0186 {
0187     struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
0188     unsigned int mpidr;
0189
0190     if (cpuid_topo->package_id != -1)
0191         goto topology_populated;
0192
0193     mpidr = read_cpuid_mpidr();
0194
0195     /* create cpu topology mapping */
0196     if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) {
0197         /*
0198          * This is a multiprocessor system
0199          * multiprocessor format & multiprocessor mode field are set
0200          */
0201
0202         if (mpidr & MPIDR_MT_BITMASK) {
0203             /* core performance interdependency */
0204             cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
0205             cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
0206             cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
0207         } else {
0208             /* largely independent cores */
0209             cpuid_topo->thread_id = -1;
0210             cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
0211             cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
0212         }
0213     } else {
0214         /*
0215          * This is an uniprocessor system
0216          * we are in multiprocessor format but uniprocessor system
0217          * or in the old uniprocessor format
0218          */
0219         cpuid_topo->thread_id = -1;
0220         cpuid_topo->core_id = 0;
0221         cpuid_topo->package_id = -1;
0222     }
0223
0224     update_cpu_capacity(cpuid);
0225
0226     pr_info("CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n",
0227         cpuid, cpu_topology[cpuid].thread_id,
0228         cpu_topology[cpuid].core_id,
0229         cpu_topology[cpuid].package_id, mpidr);
0230
0231 topology_populated:
0232     update_siblings_masks(cpuid);
0233 }
0234
0235 /*
0236  * init_cpu_topology is called at boot when only one cpu is running
0237  * which prevent simultaneous write access to cpu_topology array
0238  */
0239 void __init init_cpu_topology(void)
0240 {
0241     reset_cpu_topology();
0242     smp_wmb();
0243
0244     parse_dt_topology();
0245 }