arm/kernel/swp_emulate.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/kernel/swp_emulate.c
0004  *
0005  *  Copyright (C) 2009 ARM Limited
0006  *  __user_* functions adapted from include/asm/uaccess.h
0007  *
0008  *  Implements emulation of the SWP/SWPB instructions using load-exclusive and
0009  *  store-exclusive for processors that have them disabled (or future ones that
0010  *  might not implement them).
0011  *
0012  *  Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
0013  *  Where: Rt  = destination
0014  *     Rt2 = source
0015  *     Rn  = address
0016  */
0017
0018 #include <linux/init.h>
0019 #include <linux/kernel.h>
0020 #include <linux/proc_fs.h>
0021 #include <linux/seq_file.h>
0022 #include <linux/sched.h>
0023 #include <linux/sched/mm.h>
0024 #include <linux/syscalls.h>
0025 #include <linux/perf_event.h>
0026
0027 #include <asm/opcodes.h>
0028 #include <asm/system_info.h>
0029 #include <asm/traps.h>
0030 #include <linux/uaccess.h>
0031
0032 /*
0033  * Error-checking SWP macros implemented using ldrex{b}/strex{b}
0034  */
0035 #define __user_swpX_asm(data, addr, res, temp, B)       \
0036     __asm__ __volatile__(                   \
0037     "0: ldrex"B"    %2, [%3]\n"         \
0038     "1: strex"B"    %0, %1, [%3]\n"         \
0039     "   cmp     %0, #0\n"           \
0040     "   moveq       %1, %2\n"           \
0041     "   movne       %0, %4\n"           \
0042     "2:\n"                          \
0043     "   .section     .text.fixup,\"ax\"\n"      \
0044     "   .align      2\n"                \
0045     "3: mov     %0, %5\n"           \
0046     "   b       2b\n"               \
0047     "   .previous\n"                    \
0048     "   .section     __ex_table,\"a\"\n"        \
0049     "   .align      3\n"                \
0050     "   .long       0b, 3b\n"           \
0051     "   .long       1b, 3b\n"           \
0052     "   .previous"                  \
0053     : "=&r" (res), "+r" (data), "=&r" (temp)        \
0054     : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT)      \
0055     : "cc", "memory")
0056
0057 #define __user_swp_asm(data, addr, res, temp) \
0058     __user_swpX_asm(data, addr, res, temp, "")
0059 #define __user_swpb_asm(data, addr, res, temp) \
0060     __user_swpX_asm(data, addr, res, temp, "b")
0061
0062 /*
0063  * Macros/defines for extracting register numbers from instruction.
0064  */
0065 #define EXTRACT_REG_NUM(instruction, offset) \
0066     (((instruction) & (0xf << (offset))) >> (offset))
0067 #define RN_OFFSET  16
0068 #define RT_OFFSET  12
0069 #define RT2_OFFSET  0
0070 /*
0071  * Bit 22 of the instruction encoding distinguishes between
0072  * the SWP and SWPB variants (bit set means SWPB).
0073  */
0074 #define TYPE_SWPB (1 << 22)
0075
0076 static unsigned long swpcounter;
0077 static unsigned long swpbcounter;
0078 static unsigned long abtcounter;
0079 static pid_t         previous_pid;
0080
0081 #ifdef CONFIG_PROC_FS
0082 static int proc_status_show(struct seq_file *m, void *v)
0083 {
0084     seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
0085     seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
0086     seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
0087     if (previous_pid != 0)
0088         seq_printf(m, "Last process:\t\t%d\n", previous_pid);
0089     return 0;
0090 }
0091 #endif
0092
0093 /*
0094  * Set up process info to signal segmentation fault - called on access error.
0095  */
0096 static void set_segfault(struct pt_regs *regs, unsigned long addr)
0097 {
0098     int si_code;
0099
0100     mmap_read_lock(current->mm);
0101     if (find_vma(current->mm, addr) == NULL)
0102         si_code = SEGV_MAPERR;
0103     else
0104         si_code = SEGV_ACCERR;
0105     mmap_read_unlock(current->mm);
0106
0107     pr_debug("SWP{B} emulation: access caused memory abort!\n");
0108     arm_notify_die("Illegal memory access", regs,
0109                SIGSEGV, si_code,
0110                (void __user *)instruction_pointer(regs),
0111                0, 0);
0112
0113     abtcounter++;
0114 }
0115
0116 static int emulate_swpX(unsigned int address, unsigned int *data,
0117             unsigned int type)
0118 {
0119     unsigned int res = 0;
0120
0121     if ((type != TYPE_SWPB) && (address & 0x3)) {
0122         /* SWP to unaligned address not permitted */
0123         pr_debug("SWP instruction on unaligned pointer!\n");
0124         return -EFAULT;
0125     }
0126
0127     while (1) {
0128         unsigned long temp;
0129         unsigned int __ua_flags;
0130
0131         __ua_flags = uaccess_save_and_enable();
0132         if (type == TYPE_SWPB)
0133             __user_swpb_asm(*data, address, res, temp);
0134         else
0135             __user_swp_asm(*data, address, res, temp);
0136         uaccess_restore(__ua_flags);
0137
0138         if (likely(res != -EAGAIN) || signal_pending(current))
0139             break;
0140
0141         cond_resched();
0142     }
0143
0144     if (res == 0) {
0145         if (type == TYPE_SWPB)
0146             swpbcounter++;
0147         else
0148             swpcounter++;
0149     }
0150
0151     return res;
0152 }
0153
0154 /*
0155  * swp_handler logs the id of calling process, dissects the instruction, sanity
0156  * checks the memory location, calls emulate_swpX for the actual operation and
0157  * deals with fixup/error handling before returning
0158  */
0159 static int swp_handler(struct pt_regs *regs, unsigned int instr)
0160 {
0161     unsigned int address, destreg, data, type;
0162     unsigned int res = 0;
0163
0164     perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
0165
0166     res = arm_check_condition(instr, regs->ARM_cpsr);
0167     switch (res) {
0168     case ARM_OPCODE_CONDTEST_PASS:
0169         break;
0170     case ARM_OPCODE_CONDTEST_FAIL:
0171         /* Condition failed - return to next instruction */
0172         regs->ARM_pc += 4;
0173         return 0;
0174     case ARM_OPCODE_CONDTEST_UNCOND:
0175         /* If unconditional encoding - not a SWP, undef */
0176         return -EFAULT;
0177     default:
0178         return -EINVAL;
0179     }
0180
0181     if (current->pid != previous_pid) {
0182         pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
0183              current->comm, (unsigned long)current->pid);
0184         previous_pid = current->pid;
0185     }
0186
0187     address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
0188     data    = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
0189     destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
0190
0191     type = instr & TYPE_SWPB;
0192
0193     pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
0194          EXTRACT_REG_NUM(instr, RN_OFFSET), address,
0195          destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
0196
0197     /* Check access in reasonable access range for both SWP and SWPB */
0198     if (!access_ok((void __user *)(address & ~3), 4)) {
0199         pr_debug("SWP{B} emulation: access to %p not allowed!\n",
0200              (void *)address);
0201         res = -EFAULT;
0202     } else {
0203         res = emulate_swpX(address, &data, type);
0204     }
0205
0206     if (res == 0) {
0207         /*
0208          * On successful emulation, revert the adjustment to the PC
0209          * made in kernel/traps.c in order to resume execution at the
0210          * instruction following the SWP{B}.
0211          */
0212         regs->ARM_pc += 4;
0213         regs->uregs[destreg] = data;
0214     } else if (res == -EFAULT) {
0215         /*
0216          * Memory errors do not mean emulation failed.
0217          * Set up signal info to return SEGV, then return OK
0218          */
0219         set_segfault(regs, address);
0220     }
0221
0222     return 0;
0223 }
0224
0225 /*
0226  * Only emulate SWP/SWPB executed in ARM state/User mode.
0227  * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
0228  */
0229 static struct undef_hook swp_hook = {
0230     .instr_mask = 0x0fb00ff0,
0231     .instr_val  = 0x01000090,
0232     .cpsr_mask  = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
0233     .cpsr_val   = USR_MODE,
0234     .fn     = swp_handler
0235 };
0236
0237 /*
0238  * Register handler and create status file in /proc/cpu
0239  * Invoked as late_initcall, since not needed before init spawned.
0240  */
0241 static int __init swp_emulation_init(void)
0242 {
0243     if (cpu_architecture() < CPU_ARCH_ARMv7)
0244         return 0;
0245
0246 #ifdef CONFIG_PROC_FS
0247     if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL,
0248             proc_status_show))
0249         return -ENOMEM;
0250 #endif /* CONFIG_PROC_FS */
0251
0252     pr_notice("Registering SWP/SWPB emulation handler\n");
0253     register_undef_hook(&swp_hook);
0254
0255     return 0;
0256 }
0257
0258 late_initcall(swp_emulation_init);