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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  linux/arch/arm/kernel/smp.c
0004  *
0005  *  Copyright (C) 2002 ARM Limited, All Rights Reserved.
0006  */
0007 #include <linux/module.h>
0008 #include <linux/delay.h>
0009 #include <linux/init.h>
0010 #include <linux/spinlock.h>
0011 #include <linux/sched/mm.h>
0012 #include <linux/sched/hotplug.h>
0013 #include <linux/sched/task_stack.h>
0014 #include <linux/interrupt.h>
0015 #include <linux/cache.h>
0016 #include <linux/profile.h>
0017 #include <linux/errno.h>
0018 #include <linux/mm.h>
0019 #include <linux/err.h>
0020 #include <linux/cpu.h>
0021 #include <linux/seq_file.h>
0022 #include <linux/irq.h>
0023 #include <linux/nmi.h>
0024 #include <linux/percpu.h>
0025 #include <linux/clockchips.h>
0026 #include <linux/completion.h>
0027 #include <linux/cpufreq.h>
0028 #include <linux/irq_work.h>
0029 #include <linux/kernel_stat.h>
0030 
0031 #include <linux/atomic.h>
0032 #include <asm/bugs.h>
0033 #include <asm/smp.h>
0034 #include <asm/cacheflush.h>
0035 #include <asm/cpu.h>
0036 #include <asm/cputype.h>
0037 #include <asm/exception.h>
0038 #include <asm/idmap.h>
0039 #include <asm/topology.h>
0040 #include <asm/mmu_context.h>
0041 #include <asm/procinfo.h>
0042 #include <asm/processor.h>
0043 #include <asm/sections.h>
0044 #include <asm/tlbflush.h>
0045 #include <asm/ptrace.h>
0046 #include <asm/smp_plat.h>
0047 #include <asm/virt.h>
0048 #include <asm/mach/arch.h>
0049 #include <asm/mpu.h>
0050 
0051 #define CREATE_TRACE_POINTS
0052 #include <trace/events/ipi.h>
0053 
0054 /*
0055  * as from 2.5, kernels no longer have an init_tasks structure
0056  * so we need some other way of telling a new secondary core
0057  * where to place its SVC stack
0058  */
0059 struct secondary_data secondary_data;
0060 
0061 enum ipi_msg_type {
0062     IPI_WAKEUP,
0063     IPI_TIMER,
0064     IPI_RESCHEDULE,
0065     IPI_CALL_FUNC,
0066     IPI_CPU_STOP,
0067     IPI_IRQ_WORK,
0068     IPI_COMPLETION,
0069     NR_IPI,
0070     /*
0071      * CPU_BACKTRACE is special and not included in NR_IPI
0072      * or tracable with trace_ipi_*
0073      */
0074     IPI_CPU_BACKTRACE = NR_IPI,
0075     /*
0076      * SGI8-15 can be reserved by secure firmware, and thus may
0077      * not be usable by the kernel. Please keep the above limited
0078      * to at most 8 entries.
0079      */
0080     MAX_IPI
0081 };
0082 
0083 static int ipi_irq_base __read_mostly;
0084 static int nr_ipi __read_mostly = NR_IPI;
0085 static struct irq_desc *ipi_desc[MAX_IPI] __read_mostly;
0086 
0087 static void ipi_setup(int cpu);
0088 
0089 static DECLARE_COMPLETION(cpu_running);
0090 
0091 static struct smp_operations smp_ops __ro_after_init;
0092 
0093 void __init smp_set_ops(const struct smp_operations *ops)
0094 {
0095     if (ops)
0096         smp_ops = *ops;
0097 };
0098 
0099 static unsigned long get_arch_pgd(pgd_t *pgd)
0100 {
0101 #ifdef CONFIG_ARM_LPAE
0102     return __phys_to_pfn(virt_to_phys(pgd));
0103 #else
0104     return virt_to_phys(pgd);
0105 #endif
0106 }
0107 
0108 #if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
0109 static int secondary_biglittle_prepare(unsigned int cpu)
0110 {
0111     if (!cpu_vtable[cpu])
0112         cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL);
0113 
0114     return cpu_vtable[cpu] ? 0 : -ENOMEM;
0115 }
0116 
0117 static void secondary_biglittle_init(void)
0118 {
0119     init_proc_vtable(lookup_processor(read_cpuid_id())->proc);
0120 }
0121 #else
0122 static int secondary_biglittle_prepare(unsigned int cpu)
0123 {
0124     return 0;
0125 }
0126 
0127 static void secondary_biglittle_init(void)
0128 {
0129 }
0130 #endif
0131 
0132 int __cpu_up(unsigned int cpu, struct task_struct *idle)
0133 {
0134     int ret;
0135 
0136     if (!smp_ops.smp_boot_secondary)
0137         return -ENOSYS;
0138 
0139     ret = secondary_biglittle_prepare(cpu);
0140     if (ret)
0141         return ret;
0142 
0143     /*
0144      * We need to tell the secondary core where to find
0145      * its stack and the page tables.
0146      */
0147     secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
0148 #ifdef CONFIG_ARM_MPU
0149     secondary_data.mpu_rgn_info = &mpu_rgn_info;
0150 #endif
0151 
0152 #ifdef CONFIG_MMU
0153     secondary_data.pgdir = virt_to_phys(idmap_pgd);
0154     secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
0155 #endif
0156     secondary_data.task = idle;
0157     sync_cache_w(&secondary_data);
0158 
0159     /*
0160      * Now bring the CPU into our world.
0161      */
0162     ret = smp_ops.smp_boot_secondary(cpu, idle);
0163     if (ret == 0) {
0164         /*
0165          * CPU was successfully started, wait for it
0166          * to come online or time out.
0167          */
0168         wait_for_completion_timeout(&cpu_running,
0169                          msecs_to_jiffies(1000));
0170 
0171         if (!cpu_online(cpu)) {
0172             pr_crit("CPU%u: failed to come online\n", cpu);
0173             ret = -EIO;
0174         }
0175     } else {
0176         pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
0177     }
0178 
0179 
0180     memset(&secondary_data, 0, sizeof(secondary_data));
0181     return ret;
0182 }
0183 
0184 /* platform specific SMP operations */
0185 void __init smp_init_cpus(void)
0186 {
0187     if (smp_ops.smp_init_cpus)
0188         smp_ops.smp_init_cpus();
0189 }
0190 
0191 int platform_can_secondary_boot(void)
0192 {
0193     return !!smp_ops.smp_boot_secondary;
0194 }
0195 
0196 int platform_can_cpu_hotplug(void)
0197 {
0198 #ifdef CONFIG_HOTPLUG_CPU
0199     if (smp_ops.cpu_kill)
0200         return 1;
0201 #endif
0202 
0203     return 0;
0204 }
0205 
0206 #ifdef CONFIG_HOTPLUG_CPU
0207 static int platform_cpu_kill(unsigned int cpu)
0208 {
0209     if (smp_ops.cpu_kill)
0210         return smp_ops.cpu_kill(cpu);
0211     return 1;
0212 }
0213 
0214 static int platform_cpu_disable(unsigned int cpu)
0215 {
0216     if (smp_ops.cpu_disable)
0217         return smp_ops.cpu_disable(cpu);
0218 
0219     return 0;
0220 }
0221 
0222 int platform_can_hotplug_cpu(unsigned int cpu)
0223 {
0224     /* cpu_die must be specified to support hotplug */
0225     if (!smp_ops.cpu_die)
0226         return 0;
0227 
0228     if (smp_ops.cpu_can_disable)
0229         return smp_ops.cpu_can_disable(cpu);
0230 
0231     /*
0232      * By default, allow disabling all CPUs except the first one,
0233      * since this is special on a lot of platforms, e.g. because
0234      * of clock tick interrupts.
0235      */
0236     return cpu != 0;
0237 }
0238 
0239 static void ipi_teardown(int cpu)
0240 {
0241     int i;
0242 
0243     if (WARN_ON_ONCE(!ipi_irq_base))
0244         return;
0245 
0246     for (i = 0; i < nr_ipi; i++)
0247         disable_percpu_irq(ipi_irq_base + i);
0248 }
0249 
0250 /*
0251  * __cpu_disable runs on the processor to be shutdown.
0252  */
0253 int __cpu_disable(void)
0254 {
0255     unsigned int cpu = smp_processor_id();
0256     int ret;
0257 
0258     ret = platform_cpu_disable(cpu);
0259     if (ret)
0260         return ret;
0261 
0262 #ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
0263     remove_cpu_topology(cpu);
0264 #endif
0265 
0266     /*
0267      * Take this CPU offline.  Once we clear this, we can't return,
0268      * and we must not schedule until we're ready to give up the cpu.
0269      */
0270     set_cpu_online(cpu, false);
0271     ipi_teardown(cpu);
0272 
0273     /*
0274      * OK - migrate IRQs away from this CPU
0275      */
0276     irq_migrate_all_off_this_cpu();
0277 
0278     /*
0279      * Flush user cache and TLB mappings, and then remove this CPU
0280      * from the vm mask set of all processes.
0281      *
0282      * Caches are flushed to the Level of Unification Inner Shareable
0283      * to write-back dirty lines to unified caches shared by all CPUs.
0284      */
0285     flush_cache_louis();
0286     local_flush_tlb_all();
0287 
0288     return 0;
0289 }
0290 
0291 /*
0292  * called on the thread which is asking for a CPU to be shutdown -
0293  * waits until shutdown has completed, or it is timed out.
0294  */
0295 void __cpu_die(unsigned int cpu)
0296 {
0297     if (!cpu_wait_death(cpu, 5)) {
0298         pr_err("CPU%u: cpu didn't die\n", cpu);
0299         return;
0300     }
0301     pr_debug("CPU%u: shutdown\n", cpu);
0302 
0303     clear_tasks_mm_cpumask(cpu);
0304     /*
0305      * platform_cpu_kill() is generally expected to do the powering off
0306      * and/or cutting of clocks to the dying CPU.  Optionally, this may
0307      * be done by the CPU which is dying in preference to supporting
0308      * this call, but that means there is _no_ synchronisation between
0309      * the requesting CPU and the dying CPU actually losing power.
0310      */
0311     if (!platform_cpu_kill(cpu))
0312         pr_err("CPU%u: unable to kill\n", cpu);
0313 }
0314 
0315 /*
0316  * Called from the idle thread for the CPU which has been shutdown.
0317  *
0318  * Note that we disable IRQs here, but do not re-enable them
0319  * before returning to the caller. This is also the behaviour
0320  * of the other hotplug-cpu capable cores, so presumably coming
0321  * out of idle fixes this.
0322  */
0323 void arch_cpu_idle_dead(void)
0324 {
0325     unsigned int cpu = smp_processor_id();
0326 
0327     idle_task_exit();
0328 
0329     local_irq_disable();
0330 
0331     /*
0332      * Flush the data out of the L1 cache for this CPU.  This must be
0333      * before the completion to ensure that data is safely written out
0334      * before platform_cpu_kill() gets called - which may disable
0335      * *this* CPU and power down its cache.
0336      */
0337     flush_cache_louis();
0338 
0339     /*
0340      * Tell __cpu_die() that this CPU is now safe to dispose of.  Once
0341      * this returns, power and/or clocks can be removed at any point
0342      * from this CPU and its cache by platform_cpu_kill().
0343      */
0344     (void)cpu_report_death();
0345 
0346     /*
0347      * Ensure that the cache lines associated with that completion are
0348      * written out.  This covers the case where _this_ CPU is doing the
0349      * powering down, to ensure that the completion is visible to the
0350      * CPU waiting for this one.
0351      */
0352     flush_cache_louis();
0353 
0354     /*
0355      * The actual CPU shutdown procedure is at least platform (if not
0356      * CPU) specific.  This may remove power, or it may simply spin.
0357      *
0358      * Platforms are generally expected *NOT* to return from this call,
0359      * although there are some which do because they have no way to
0360      * power down the CPU.  These platforms are the _only_ reason we
0361      * have a return path which uses the fragment of assembly below.
0362      *
0363      * The return path should not be used for platforms which can
0364      * power off the CPU.
0365      */
0366     if (smp_ops.cpu_die)
0367         smp_ops.cpu_die(cpu);
0368 
0369     pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
0370         cpu);
0371 
0372     /*
0373      * Do not return to the idle loop - jump back to the secondary
0374      * cpu initialisation.  There's some initialisation which needs
0375      * to be repeated to undo the effects of taking the CPU offline.
0376      */
0377     __asm__("mov    sp, %0\n"
0378     "   mov fp, #0\n"
0379     "   mov r0, %1\n"
0380     "   b   secondary_start_kernel"
0381         :
0382         : "r" (task_stack_page(current) + THREAD_SIZE - 8),
0383           "r" (current)
0384         : "r0");
0385 }
0386 #endif /* CONFIG_HOTPLUG_CPU */
0387 
0388 /*
0389  * Called by both boot and secondaries to move global data into
0390  * per-processor storage.
0391  */
0392 static void smp_store_cpu_info(unsigned int cpuid)
0393 {
0394     struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
0395 
0396     cpu_info->loops_per_jiffy = loops_per_jiffy;
0397     cpu_info->cpuid = read_cpuid_id();
0398 
0399     store_cpu_topology(cpuid);
0400     check_cpu_icache_size(cpuid);
0401 }
0402 
0403 static void set_current(struct task_struct *cur)
0404 {
0405     /* Set TPIDRURO */
0406     asm("mcr p15, 0, %0, c13, c0, 3" :: "r"(cur) : "memory");
0407 }
0408 
0409 /*
0410  * This is the secondary CPU boot entry.  We're using this CPUs
0411  * idle thread stack, but a set of temporary page tables.
0412  */
0413 asmlinkage void secondary_start_kernel(struct task_struct *task)
0414 {
0415     struct mm_struct *mm = &init_mm;
0416     unsigned int cpu;
0417 
0418     set_current(task);
0419 
0420     secondary_biglittle_init();
0421 
0422     /*
0423      * The identity mapping is uncached (strongly ordered), so
0424      * switch away from it before attempting any exclusive accesses.
0425      */
0426     cpu_switch_mm(mm->pgd, mm);
0427     local_flush_bp_all();
0428     enter_lazy_tlb(mm, current);
0429     local_flush_tlb_all();
0430 
0431     /*
0432      * All kernel threads share the same mm context; grab a
0433      * reference and switch to it.
0434      */
0435     cpu = smp_processor_id();
0436     mmgrab(mm);
0437     current->active_mm = mm;
0438     cpumask_set_cpu(cpu, mm_cpumask(mm));
0439 
0440     cpu_init();
0441 
0442 #ifndef CONFIG_MMU
0443     setup_vectors_base();
0444 #endif
0445     pr_debug("CPU%u: Booted secondary processor\n", cpu);
0446 
0447     trace_hardirqs_off();
0448 
0449     /*
0450      * Give the platform a chance to do its own initialisation.
0451      */
0452     if (smp_ops.smp_secondary_init)
0453         smp_ops.smp_secondary_init(cpu);
0454 
0455     notify_cpu_starting(cpu);
0456 
0457     ipi_setup(cpu);
0458 
0459     calibrate_delay();
0460 
0461     smp_store_cpu_info(cpu);
0462 
0463     /*
0464      * OK, now it's safe to let the boot CPU continue.  Wait for
0465      * the CPU migration code to notice that the CPU is online
0466      * before we continue - which happens after __cpu_up returns.
0467      */
0468     set_cpu_online(cpu, true);
0469 
0470     check_other_bugs();
0471 
0472     complete(&cpu_running);
0473 
0474     local_irq_enable();
0475     local_fiq_enable();
0476     local_abt_enable();
0477 
0478     /*
0479      * OK, it's off to the idle thread for us
0480      */
0481     cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
0482 }
0483 
0484 void __init smp_cpus_done(unsigned int max_cpus)
0485 {
0486     int cpu;
0487     unsigned long bogosum = 0;
0488 
0489     for_each_online_cpu(cpu)
0490         bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
0491 
0492     printk(KERN_INFO "SMP: Total of %d processors activated "
0493            "(%lu.%02lu BogoMIPS).\n",
0494            num_online_cpus(),
0495            bogosum / (500000/HZ),
0496            (bogosum / (5000/HZ)) % 100);
0497 
0498     hyp_mode_check();
0499 }
0500 
0501 void __init smp_prepare_boot_cpu(void)
0502 {
0503     set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
0504 }
0505 
0506 void __init smp_prepare_cpus(unsigned int max_cpus)
0507 {
0508     unsigned int ncores = num_possible_cpus();
0509 
0510     init_cpu_topology();
0511 
0512     smp_store_cpu_info(smp_processor_id());
0513 
0514     /*
0515      * are we trying to boot more cores than exist?
0516      */
0517     if (max_cpus > ncores)
0518         max_cpus = ncores;
0519     if (ncores > 1 && max_cpus) {
0520         /*
0521          * Initialise the present map, which describes the set of CPUs
0522          * actually populated at the present time. A platform should
0523          * re-initialize the map in the platforms smp_prepare_cpus()
0524          * if present != possible (e.g. physical hotplug).
0525          */
0526         init_cpu_present(cpu_possible_mask);
0527 
0528         /*
0529          * Initialise the SCU if there are more than one CPU
0530          * and let them know where to start.
0531          */
0532         if (smp_ops.smp_prepare_cpus)
0533             smp_ops.smp_prepare_cpus(max_cpus);
0534     }
0535 }
0536 
0537 static const char *ipi_types[NR_IPI] __tracepoint_string = {
0538     [IPI_WAKEUP]        = "CPU wakeup interrupts",
0539     [IPI_TIMER]     = "Timer broadcast interrupts",
0540     [IPI_RESCHEDULE]    = "Rescheduling interrupts",
0541     [IPI_CALL_FUNC]     = "Function call interrupts",
0542     [IPI_CPU_STOP]      = "CPU stop interrupts",
0543     [IPI_IRQ_WORK]      = "IRQ work interrupts",
0544     [IPI_COMPLETION]    = "completion interrupts",
0545 };
0546 
0547 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
0548 
0549 void show_ipi_list(struct seq_file *p, int prec)
0550 {
0551     unsigned int cpu, i;
0552 
0553     for (i = 0; i < NR_IPI; i++) {
0554         if (!ipi_desc[i])
0555             continue;
0556 
0557         seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
0558 
0559         for_each_online_cpu(cpu)
0560             seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
0561 
0562         seq_printf(p, " %s\n", ipi_types[i]);
0563     }
0564 }
0565 
0566 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
0567 {
0568     smp_cross_call(mask, IPI_CALL_FUNC);
0569 }
0570 
0571 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
0572 {
0573     smp_cross_call(mask, IPI_WAKEUP);
0574 }
0575 
0576 void arch_send_call_function_single_ipi(int cpu)
0577 {
0578     smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
0579 }
0580 
0581 #ifdef CONFIG_IRQ_WORK
0582 void arch_irq_work_raise(void)
0583 {
0584     if (arch_irq_work_has_interrupt())
0585         smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
0586 }
0587 #endif
0588 
0589 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
0590 void tick_broadcast(const struct cpumask *mask)
0591 {
0592     smp_cross_call(mask, IPI_TIMER);
0593 }
0594 #endif
0595 
0596 static DEFINE_RAW_SPINLOCK(stop_lock);
0597 
0598 /*
0599  * ipi_cpu_stop - handle IPI from smp_send_stop()
0600  */
0601 static void ipi_cpu_stop(unsigned int cpu)
0602 {
0603     if (system_state <= SYSTEM_RUNNING) {
0604         raw_spin_lock(&stop_lock);
0605         pr_crit("CPU%u: stopping\n", cpu);
0606         dump_stack();
0607         raw_spin_unlock(&stop_lock);
0608     }
0609 
0610     set_cpu_online(cpu, false);
0611 
0612     local_fiq_disable();
0613     local_irq_disable();
0614 
0615     while (1) {
0616         cpu_relax();
0617         wfe();
0618     }
0619 }
0620 
0621 static DEFINE_PER_CPU(struct completion *, cpu_completion);
0622 
0623 int register_ipi_completion(struct completion *completion, int cpu)
0624 {
0625     per_cpu(cpu_completion, cpu) = completion;
0626     return IPI_COMPLETION;
0627 }
0628 
0629 static void ipi_complete(unsigned int cpu)
0630 {
0631     complete(per_cpu(cpu_completion, cpu));
0632 }
0633 
0634 /*
0635  * Main handler for inter-processor interrupts
0636  */
0637 static void do_handle_IPI(int ipinr)
0638 {
0639     unsigned int cpu = smp_processor_id();
0640 
0641     if ((unsigned)ipinr < NR_IPI)
0642         trace_ipi_entry_rcuidle(ipi_types[ipinr]);
0643 
0644     switch (ipinr) {
0645     case IPI_WAKEUP:
0646         break;
0647 
0648 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
0649     case IPI_TIMER:
0650         tick_receive_broadcast();
0651         break;
0652 #endif
0653 
0654     case IPI_RESCHEDULE:
0655         scheduler_ipi();
0656         break;
0657 
0658     case IPI_CALL_FUNC:
0659         generic_smp_call_function_interrupt();
0660         break;
0661 
0662     case IPI_CPU_STOP:
0663         ipi_cpu_stop(cpu);
0664         break;
0665 
0666 #ifdef CONFIG_IRQ_WORK
0667     case IPI_IRQ_WORK:
0668         irq_work_run();
0669         break;
0670 #endif
0671 
0672     case IPI_COMPLETION:
0673         ipi_complete(cpu);
0674         break;
0675 
0676     case IPI_CPU_BACKTRACE:
0677         printk_deferred_enter();
0678         nmi_cpu_backtrace(get_irq_regs());
0679         printk_deferred_exit();
0680         break;
0681 
0682     default:
0683         pr_crit("CPU%u: Unknown IPI message 0x%x\n",
0684                 cpu, ipinr);
0685         break;
0686     }
0687 
0688     if ((unsigned)ipinr < NR_IPI)
0689         trace_ipi_exit_rcuidle(ipi_types[ipinr]);
0690 }
0691 
0692 /* Legacy version, should go away once all irqchips have been converted */
0693 void handle_IPI(int ipinr, struct pt_regs *regs)
0694 {
0695     struct pt_regs *old_regs = set_irq_regs(regs);
0696 
0697     irq_enter();
0698     do_handle_IPI(ipinr);
0699     irq_exit();
0700 
0701     set_irq_regs(old_regs);
0702 }
0703 
0704 static irqreturn_t ipi_handler(int irq, void *data)
0705 {
0706     do_handle_IPI(irq - ipi_irq_base);
0707     return IRQ_HANDLED;
0708 }
0709 
0710 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
0711 {
0712     trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
0713     __ipi_send_mask(ipi_desc[ipinr], target);
0714 }
0715 
0716 static void ipi_setup(int cpu)
0717 {
0718     int i;
0719 
0720     if (WARN_ON_ONCE(!ipi_irq_base))
0721         return;
0722 
0723     for (i = 0; i < nr_ipi; i++)
0724         enable_percpu_irq(ipi_irq_base + i, 0);
0725 }
0726 
0727 void __init set_smp_ipi_range(int ipi_base, int n)
0728 {
0729     int i;
0730 
0731     WARN_ON(n < MAX_IPI);
0732     nr_ipi = min(n, MAX_IPI);
0733 
0734     for (i = 0; i < nr_ipi; i++) {
0735         int err;
0736 
0737         err = request_percpu_irq(ipi_base + i, ipi_handler,
0738                      "IPI", &irq_stat);
0739         WARN_ON(err);
0740 
0741         ipi_desc[i] = irq_to_desc(ipi_base + i);
0742         irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
0743     }
0744 
0745     ipi_irq_base = ipi_base;
0746 
0747     /* Setup the boot CPU immediately */
0748     ipi_setup(smp_processor_id());
0749 }
0750 
0751 void smp_send_reschedule(int cpu)
0752 {
0753     smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
0754 }
0755 
0756 void smp_send_stop(void)
0757 {
0758     unsigned long timeout;
0759     struct cpumask mask;
0760 
0761     cpumask_copy(&mask, cpu_online_mask);
0762     cpumask_clear_cpu(smp_processor_id(), &mask);
0763     if (!cpumask_empty(&mask))
0764         smp_cross_call(&mask, IPI_CPU_STOP);
0765 
0766     /* Wait up to one second for other CPUs to stop */
0767     timeout = USEC_PER_SEC;
0768     while (num_online_cpus() > 1 && timeout--)
0769         udelay(1);
0770 
0771     if (num_online_cpus() > 1)
0772         pr_warn("SMP: failed to stop secondary CPUs\n");
0773 }
0774 
0775 /* In case panic() and panic() called at the same time on CPU1 and CPU2,
0776  * and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
0777  * CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
0778  * kdump fails. So split out the panic_smp_self_stop() and add
0779  * set_cpu_online(smp_processor_id(), false).
0780  */
0781 void panic_smp_self_stop(void)
0782 {
0783     pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
0784              smp_processor_id());
0785     set_cpu_online(smp_processor_id(), false);
0786     while (1)
0787         cpu_relax();
0788 }
0789 
0790 #ifdef CONFIG_CPU_FREQ
0791 
0792 static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
0793 static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
0794 static unsigned long global_l_p_j_ref;
0795 static unsigned long global_l_p_j_ref_freq;
0796 
0797 static int cpufreq_callback(struct notifier_block *nb,
0798                     unsigned long val, void *data)
0799 {
0800     struct cpufreq_freqs *freq = data;
0801     struct cpumask *cpus = freq->policy->cpus;
0802     int cpu, first = cpumask_first(cpus);
0803     unsigned int lpj;
0804 
0805     if (freq->flags & CPUFREQ_CONST_LOOPS)
0806         return NOTIFY_OK;
0807 
0808     if (!per_cpu(l_p_j_ref, first)) {
0809         for_each_cpu(cpu, cpus) {
0810             per_cpu(l_p_j_ref, cpu) =
0811                 per_cpu(cpu_data, cpu).loops_per_jiffy;
0812             per_cpu(l_p_j_ref_freq, cpu) = freq->old;
0813         }
0814 
0815         if (!global_l_p_j_ref) {
0816             global_l_p_j_ref = loops_per_jiffy;
0817             global_l_p_j_ref_freq = freq->old;
0818         }
0819     }
0820 
0821     if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
0822         (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
0823         loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
0824                         global_l_p_j_ref_freq,
0825                         freq->new);
0826 
0827         lpj = cpufreq_scale(per_cpu(l_p_j_ref, first),
0828                     per_cpu(l_p_j_ref_freq, first), freq->new);
0829         for_each_cpu(cpu, cpus)
0830             per_cpu(cpu_data, cpu).loops_per_jiffy = lpj;
0831     }
0832     return NOTIFY_OK;
0833 }
0834 
0835 static struct notifier_block cpufreq_notifier = {
0836     .notifier_call  = cpufreq_callback,
0837 };
0838 
0839 static int __init register_cpufreq_notifier(void)
0840 {
0841     return cpufreq_register_notifier(&cpufreq_notifier,
0842                         CPUFREQ_TRANSITION_NOTIFIER);
0843 }
0844 core_initcall(register_cpufreq_notifier);
0845 
0846 #endif
0847 
0848 static void raise_nmi(cpumask_t *mask)
0849 {
0850     __ipi_send_mask(ipi_desc[IPI_CPU_BACKTRACE], mask);
0851 }
0852 
0853 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
0854 {
0855     nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
0856 }