arm/kernel/head-common.S

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  linux/arch/arm/kernel/head-common.S
0004  *
0005  *  Copyright (C) 1994-2002 Russell King
0006  *  Copyright (c) 2003 ARM Limited
0007  *  All Rights Reserved
0008  */
0009 #include <asm/assembler.h>
0010
0011 #define ATAG_CORE 0x54410001
0012 #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
0013 #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
0014
0015 #ifdef CONFIG_CPU_BIG_ENDIAN
0016 #define OF_DT_MAGIC 0xd00dfeed
0017 #else
0018 #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
0019 #endif
0020
0021 /*
0022  * Exception handling.  Something went wrong and we can't proceed.  We
0023  * ought to tell the user, but since we don't have any guarantee that
0024  * we're even running on the right architecture, we do virtually nothing.
0025  *
0026  * If CONFIG_DEBUG_LL is set we try to print out something about the error
0027  * and hope for the best (useful if bootloader fails to pass a proper
0028  * machine ID for example).
0029  */
0030     __HEAD
0031
0032 /* Determine validity of the r2 atags pointer.  The heuristic requires
0033  * that the pointer be aligned, in the first 16k of physical RAM and
0034  * that the ATAG_CORE marker is first and present.  If CONFIG_OF_FLATTREE
0035  * is selected, then it will also accept a dtb pointer.  Future revisions
0036  * of this function may be more lenient with the physical address and
0037  * may also be able to move the ATAGS block if necessary.
0038  *
0039  * Returns:
0040  *  r2 either valid atags pointer, valid dtb pointer, or zero
0041  *  r5, r6 corrupted
0042  */
0043 __vet_atags:
0044     tst r2, #0x3            @ aligned?
0045     bne 1f
0046
0047     ldr r5, [r2, #0]
0048 #ifdef CONFIG_OF_FLATTREE
0049     ldr r6, =OF_DT_MAGIC        @ is it a DTB?
0050     cmp r5, r6
0051     beq 2f
0052 #endif
0053     cmp r5, #ATAG_CORE_SIZE     @ is first tag ATAG_CORE?
0054     cmpne   r5, #ATAG_CORE_SIZE_EMPTY
0055     bne 1f
0056     ldr r5, [r2, #4]
0057     ldr r6, =ATAG_CORE
0058     cmp r5, r6
0059     bne 1f
0060
0061 2:  ret lr              @ atag/dtb pointer is ok
0062
0063 1:  mov r2, #0
0064     ret lr
0065 ENDPROC(__vet_atags)
0066
0067 /*
0068  * The following fragment of code is executed with the MMU on in MMU mode,
0069  * and uses absolute addresses; this is not position independent.
0070  *
0071  *  r0  = cp#15 control register (exc_ret for M-class)
0072  *  r1  = machine ID
0073  *  r2  = atags/dtb pointer
0074  *  r9  = processor ID
0075  */
0076     __INIT
0077 __mmap_switched:
0078
0079     mov r7, r1
0080     mov r8, r2
0081     mov r10, r0
0082
0083     adr r4, __mmap_switched_data
0084     mov fp, #0
0085
0086 #if defined(CONFIG_XIP_DEFLATED_DATA)
0087    ARM( ldr sp, [r4], #4 )
0088  THUMB( ldr sp, [r4] )
0089  THUMB( add r4, #4 )
0090     bl  __inflate_kernel_data       @ decompress .data to RAM
0091     teq r0, #0
0092     bne __error
0093 #elif defined(CONFIG_XIP_KERNEL)
0094    ARM( ldmia   r4!, {r0, r1, r2, sp} )
0095  THUMB( ldmia   r4!, {r0, r1, r2, r3} )
0096  THUMB( mov sp, r3 )
0097     sub r2, r2, r1
0098     bl  __memcpy            @ copy .data to RAM
0099 #endif
0100
0101    ARM( ldmia   r4!, {r0, r1, sp} )
0102  THUMB( ldmia   r4!, {r0, r1, r3} )
0103  THUMB( mov sp, r3 )
0104     sub r2, r1, r0
0105     mov r1, #0
0106     bl  __memset            @ clear .bss
0107
0108     adr_l   r0, init_task           @ get swapper task_struct
0109     set_current r0, r1
0110
0111     ldmia   r4, {r0, r1, r2, r3}
0112     str r9, [r0]            @ Save processor ID
0113     str r7, [r1]            @ Save machine type
0114     str r8, [r2]            @ Save atags pointer
0115     cmp r3, #0
0116     strne   r10, [r3]           @ Save control register values
0117 #ifdef CONFIG_KASAN
0118     bl  kasan_early_init
0119 #endif
0120     mov lr, #0
0121     b   start_kernel
0122 ENDPROC(__mmap_switched)
0123
0124     .align  2
0125     .type   __mmap_switched_data, %object
0126 __mmap_switched_data:
0127 #ifdef CONFIG_XIP_KERNEL
0128 #ifndef CONFIG_XIP_DEFLATED_DATA
0129     .long   _sdata              @ r0
0130     .long   __data_loc          @ r1
0131     .long   _edata_loc          @ r2
0132 #endif
0133     .long   __bss_stop          @ sp (temporary stack in .bss)
0134 #endif
0135
0136     .long   __bss_start         @ r0
0137     .long   __bss_stop          @ r1
0138     .long   init_thread_union + THREAD_START_SP @ sp
0139
0140     .long   processor_id            @ r0
0141     .long   __machine_arch_type     @ r1
0142     .long   __atags_pointer         @ r2
0143 #ifdef CONFIG_CPU_CP15
0144     .long   cr_alignment            @ r3
0145 #else
0146 M_CLASS(.long   exc_ret)            @ r3
0147 AR_CLASS(.long  0)              @ r3
0148 #endif
0149     .size   __mmap_switched_data, . - __mmap_switched_data
0150
0151     __FINIT
0152     .text
0153
0154 /*
0155  * This provides a C-API version of __lookup_processor_type
0156  */
0157 ENTRY(lookup_processor_type)
0158     stmfd   sp!, {r4 - r6, r9, lr}
0159     mov r9, r0
0160     bl  __lookup_processor_type
0161     mov r0, r5
0162     ldmfd   sp!, {r4 - r6, r9, pc}
0163 ENDPROC(lookup_processor_type)
0164
0165 /*
0166  * Read processor ID register (CP#15, CR0), and look up in the linker-built
0167  * supported processor list.  Note that we can't use the absolute addresses
0168  * for the __proc_info lists since we aren't running with the MMU on
0169  * (and therefore, we are not in the correct address space).  We have to
0170  * calculate the offset.
0171  *
0172  *  r9 = cpuid
0173  * Returns:
0174  *  r3, r4, r6 corrupted
0175  *  r5 = proc_info pointer in physical address space
0176  *  r9 = cpuid (preserved)
0177  */
0178 __lookup_processor_type:
0179     /*
0180      * Look in <asm/procinfo.h> for information about the __proc_info
0181      * structure.
0182      */
0183     adr_l   r5, __proc_info_begin
0184     adr_l   r6, __proc_info_end
0185 1:  ldmia   r5, {r3, r4}            @ value, mask
0186     and r4, r4, r9          @ mask wanted bits
0187     teq r3, r4
0188     beq 2f
0189     add r5, r5, #PROC_INFO_SZ       @ sizeof(proc_info_list)
0190     cmp r5, r6
0191     blo 1b
0192     mov r5, #0              @ unknown processor
0193 2:  ret lr
0194 ENDPROC(__lookup_processor_type)
0195
0196 __error_lpae:
0197 #ifdef CONFIG_DEBUG_LL
0198     adr r0, str_lpae
0199     bl  printascii
0200     b   __error
0201 str_lpae: .asciz "\nError: Kernel with LPAE support, but CPU does not support LPAE.\n"
0202 #else
0203     b   __error
0204 #endif
0205     .align
0206 ENDPROC(__error_lpae)
0207
0208 __error_p:
0209 #ifdef CONFIG_DEBUG_LL
0210     adr r0, str_p1
0211     bl  printascii
0212     mov r0, r9
0213     bl  printhex8
0214     adr r0, str_p2
0215     bl  printascii
0216     b   __error
0217 str_p1: .asciz  "\nError: unrecognized/unsupported processor variant (0x"
0218 str_p2: .asciz  ").\n"
0219     .align
0220 #endif
0221 ENDPROC(__error_p)
0222
0223 __error:
0224 #ifdef CONFIG_ARCH_RPC
0225 /*
0226  * Turn the screen red on a error - RiscPC only.
0227  */
0228     mov r0, #0x02000000
0229     mov r3, #0x11
0230     orr r3, r3, r3, lsl #8
0231     orr r3, r3, r3, lsl #16
0232     str r3, [r0], #4
0233     str r3, [r0], #4
0234     str r3, [r0], #4
0235     str r3, [r0], #4
0236 #endif
0237 1:  mov r0, r0
0238     b   1b
0239 ENDPROC(__error)