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0001 /*
0002  *  linux/arch/arm/kernel/fiqasm.S
0003  *
0004  *  Derived from code originally in linux/arch/arm/kernel/fiq.c:
0005  *
0006  *  Copyright (C) 1998 Russell King
0007  *  Copyright (C) 1998, 1999 Phil Blundell
0008  *  Copyright (C) 2011, Linaro Limited
0009  *
0010  *  FIQ support written by Philip Blundell <philb@gnu.org>, 1998.
0011  *
0012  *  FIQ support re-written by Russell King to be more generic
0013  *
0014  *  v7/Thumb-2 compatibility modifications by Linaro Limited, 2011.
0015  */
0016 
0017 #include <linux/linkage.h>
0018 #include <asm/assembler.h>
0019 
0020 /*
0021  * Taking an interrupt in FIQ mode is death, so both these functions
0022  * disable irqs for the duration.
0023  */
0024 
0025 ENTRY(__set_fiq_regs)
0026     mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
0027     mrs r1, cpsr
0028     msr cpsr_c, r2  @ select FIQ mode
0029     mov r0, r0      @ avoid hazard prior to ARMv4
0030     ldmia   r0!, {r8 - r12}
0031     ldr sp, [r0], #4
0032     ldr lr, [r0]
0033     msr cpsr_c, r1  @ return to SVC mode
0034     mov r0, r0      @ avoid hazard prior to ARMv4
0035     ret lr
0036 ENDPROC(__set_fiq_regs)
0037 
0038 ENTRY(__get_fiq_regs)
0039     mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
0040     mrs r1, cpsr
0041     msr cpsr_c, r2  @ select FIQ mode
0042     mov r0, r0      @ avoid hazard prior to ARMv4
0043     stmia   r0!, {r8 - r12}
0044     str sp, [r0], #4
0045     str lr, [r0]
0046     msr cpsr_c, r1  @ return to SVC mode
0047     mov r0, r0      @ avoid hazard prior to ARMv4
0048     ret lr
0049 ENDPROC(__get_fiq_regs)