include/debug/stm32.S

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) STMicroelectronics SA 2017 - All Rights Reserved
0004  * Author:   Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics.
0005  */
0006
0007 #ifdef CONFIG_STM32F4_DEBUG_UART
0008 #define STM32_USART_SR_OFF      0x00
0009 #define STM32_USART_TDR_OFF     0x04
0010 #endif
0011
0012 #if defined(CONFIG_STM32F7_DEBUG_UART) || defined(CONFIG_STM32H7_DEBUG_UART) || \
0013     defined(CONFIG_STM32MP1_DEBUG_UART)
0014 #define STM32_USART_SR_OFF      0x1C
0015 #define STM32_USART_TDR_OFF     0x28
0016 #endif
0017
0018 #define STM32_USART_TC          (1 << 6)    /* Tx complete       */
0019 #define STM32_USART_TXE         (1 << 7)    /* Tx data reg empty */
0020
0021 .macro  addruart, rp, rv, tmp
0022     ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical base
0023     ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virt base
0024 .endm
0025
0026 .macro  senduart,rd,rx
0027     strb    \rd, [\rx, #STM32_USART_TDR_OFF]
0028 .endm
0029
0030 .macro  waituartcts,rd,rx
0031 .endm
0032
0033 .macro  waituarttxrdy,rd,rx
0034 1001:   ldr \rd, [\rx, #(STM32_USART_SR_OFF)]   @ Read Status Register
0035     tst \rd, #STM32_USART_TXE           @ TXE = 1 = tx empty
0036     beq 1001b
0037 .endm
0038
0039 .macro  busyuart,rd,rx
0040 1001:   ldr \rd, [\rx, #(STM32_USART_SR_OFF)]   @ Read Status Register
0041     tst \rd, #STM32_USART_TC            @ TC = 1 = tx complete
0042     beq 1001b
0043 .endm