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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright 2005, 2007 Simtec Electronics
0004  *  http://armlinux.simtec.co.uk/
0005  *  Ben Dooks <ben@simtec.co.uk>
0006  */
0007 
0008 #include <linux/serial_s3c.h>
0009 
0010 /* The S5PV210/S5PC110 implementations are as belows. */
0011 
0012     .macro fifo_level_s5pv210 rd, rx
0013         ldr \rd, [\rx, # S3C2410_UFSTAT]
0014 ARM_BE8(rev \rd, \rd)
0015         and \rd, \rd, #S5PV210_UFSTAT_TXMASK
0016     .endm
0017 
0018     .macro  fifo_full_s5pv210 rd, rx
0019         ldr \rd, [\rx, # S3C2410_UFSTAT]
0020 ARM_BE8(rev \rd, \rd)
0021         tst \rd, #S5PV210_UFSTAT_TXFULL
0022     .endm
0023 
0024 /* The S3C2440 implementations are used by default as they are the
0025  * most widely re-used */
0026 
0027     .macro fifo_level_s3c2440 rd, rx
0028         ldr \rd, [\rx, # S3C2410_UFSTAT]
0029 ARM_BE8(rev \rd, \rd)
0030         and \rd, \rd, #S3C2440_UFSTAT_TXMASK
0031     .endm
0032 
0033 #ifndef fifo_level
0034 #define fifo_level fifo_level_s3c2440
0035 #endif
0036 
0037     .macro  fifo_full_s3c2440 rd, rx
0038         ldr \rd, [\rx, # S3C2410_UFSTAT]
0039 ARM_BE8(rev \rd, \rd)
0040         tst \rd, #S3C2440_UFSTAT_TXFULL
0041     .endm
0042 
0043 #ifndef fifo_full
0044 #define fifo_full fifo_full_s3c2440
0045 #endif
0046 
0047     .macro  senduart,rd,rx
0048         strb    \rd, [\rx, # S3C2410_UTXH]
0049     .endm
0050 
0051     .macro  busyuart, rd, rx
0052         ldr \rd, [\rx, # S3C2410_UFCON]
0053 ARM_BE8(rev \rd, \rd)
0054         tst \rd, #S3C2410_UFCON_FIFOMODE    @ fifo enabled?
0055         beq 1001f               @
0056         @ FIFO enabled...
0057 1003:
0058         fifo_full \rd, \rx
0059         bne 1003b
0060         b   1002f
0061 
0062 1001:
0063         @ busy waiting for non fifo
0064         ldr \rd, [\rx, # S3C2410_UTRSTAT]
0065 ARM_BE8(rev \rd, \rd)
0066         tst \rd, #S3C2410_UTRSTAT_TXFE
0067         beq 1001b
0068 
0069 1002:       @ exit busyuart
0070     .endm
0071 
0072     .macro  waituartcts,rd,rx
0073     .endm
0074 
0075     .macro  waituarttxrdy,rd,rx
0076         ldr \rd, [\rx, # S3C2410_UFCON]
0077 ARM_BE8(rev \rd, \rd)
0078         tst \rd, #S3C2410_UFCON_FIFOMODE    @ fifo enabled?
0079         beq 1001f               @
0080         @ FIFO enabled...
0081 1003:
0082         fifo_level \rd, \rx
0083         teq \rd, #0
0084         bne 1003b
0085         b   1002f
0086 1001:
0087         @ idle waiting for non fifo
0088         ldr \rd, [\rx, # S3C2410_UTRSTAT]
0089 ARM_BE8(rev \rd, \rd)
0090         tst \rd, #S3C2410_UTRSTAT_TXFE
0091         beq 1001b
0092 
0093 1002:       @ exit busyuart
0094     .endm